Searched refs:FICR_TEMP_B4_B_Pos (Results 1 – 7 of 7) sorted by relevance
1572 #define FICR_TEMP_B4_B_Pos (0UL) /*!< Position of B field. */ macro1573 #define FICR_TEMP_B4_B_Msk (0x3FFFUL << FICR_TEMP_B4_B_Pos) /*!< Bit mask of B field. */
1855 #define FICR_TEMP_B4_B_Pos (0UL) /*!< Position of B field. */ macro1856 #define FICR_TEMP_B4_B_Msk (0x3FFFUL << FICR_TEMP_B4_B_Pos) /*!< Bit mask of B field. */
1657 #define FICR_TEMP_B4_B_Pos (0UL) /*!< Position of B field. */ macro1658 #define FICR_TEMP_B4_B_Msk (0x3FFFUL << FICR_TEMP_B4_B_Pos) /*!< Bit mask of B field. */
2349 #define FICR_TEMP_B4_B_Pos (0UL) /*!< Position of B field. */ macro2350 #define FICR_TEMP_B4_B_Msk (0x3FFFUL << FICR_TEMP_B4_B_Pos) /*!< Bit mask of B field. */
1684 #define FICR_TEMP_B4_B_Pos (0UL) /*!< Position of B field. */ macro1685 #define FICR_TEMP_B4_B_Msk (0x3FFFUL << FICR_TEMP_B4_B_Pos) /*!< Bit mask of B field. */
1771 #define FICR_TEMP_B4_B_Pos (0UL) /*!< Position of B field. */ macro1772 #define FICR_TEMP_B4_B_Msk (0x3FFFUL << FICR_TEMP_B4_B_Pos) /*!< Bit mask of B field. */
