| /hal_nordic-3.4.0/nrfx/helpers/ |
| D | nrfx_gppi_dppi.c | 41 bool nrfx_gppi_channel_check(uint8_t channel) in nrfx_gppi_channel_check() argument
43 return nrfy_dppi_channel_check(NRF_DPPIC, channel); in nrfx_gppi_channel_check()
66 void nrfx_gppi_event_endpoint_setup(uint8_t channel, uint32_t eep) in nrfx_gppi_event_endpoint_setup() argument
69 NRF_DPPI_ENDPOINT_SETUP(eep, channel); in nrfx_gppi_event_endpoint_setup()
72 void nrfx_gppi_task_endpoint_setup(uint8_t channel, uint32_t tep) in nrfx_gppi_task_endpoint_setup() argument
75 NRF_DPPI_ENDPOINT_SETUP(tep, channel); in nrfx_gppi_task_endpoint_setup()
78 void nrfx_gppi_channel_endpoints_setup(uint8_t channel, uint32_t eep, uint32_t tep) in nrfx_gppi_channel_endpoints_setup() argument
80 nrfx_gppi_event_endpoint_setup(channel, eep); in nrfx_gppi_channel_endpoints_setup()
81 nrfx_gppi_task_endpoint_setup(channel, tep); in nrfx_gppi_channel_endpoints_setup()
84 void nrfx_gppi_channel_endpoints_clear(uint8_t channel, uint32_t eep, uint32_t tep) in nrfx_gppi_channel_endpoints_clear() argument
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| D | nrfx_gppi_ppi.c | 42 bool nrfx_gppi_channel_check(uint8_t channel) in nrfx_gppi_channel_check() argument
44 return (nrf_ppi_channel_enable_get(NRF_PPI, (nrf_ppi_channel_t)channel) == in nrfx_gppi_channel_check()
63 void nrfx_gppi_event_endpoint_setup(uint8_t channel, uint32_t eep) in nrfx_gppi_event_endpoint_setup() argument
65 nrf_ppi_event_endpoint_setup(NRF_PPI, (nrf_ppi_channel_t)channel, eep); in nrfx_gppi_event_endpoint_setup()
68 void nrfx_gppi_task_endpoint_setup(uint8_t channel, uint32_t tep) in nrfx_gppi_task_endpoint_setup() argument
70 nrf_ppi_task_endpoint_setup(NRF_PPI, (nrf_ppi_channel_t)channel, tep); in nrfx_gppi_task_endpoint_setup()
73 void nrfx_gppi_channel_endpoints_setup(uint8_t channel, uint32_t eep, uint32_t tep) in nrfx_gppi_channel_endpoints_setup() argument
75 nrf_ppi_channel_endpoint_setup(NRF_PPI, (nrf_ppi_channel_t)channel, eep, tep); in nrfx_gppi_channel_endpoints_setup()
78 void nrfx_gppi_channel_endpoints_clear(uint8_t channel, uint32_t eep, uint32_t tep) in nrfx_gppi_channel_endpoints_clear() argument
80 nrfx_gppi_event_endpoint_clear(channel, eep); in nrfx_gppi_channel_endpoints_clear()
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| D | nrfx_gppi.h | 197 bool nrfx_gppi_channel_check(uint8_t channel);
231 void nrfx_gppi_event_endpoint_setup(uint8_t channel, uint32_t eep);
242 void nrfx_gppi_task_endpoint_setup(uint8_t channel, uint32_t tep);
251 void nrfx_gppi_channel_endpoints_setup(uint8_t channel, uint32_t eep, uint32_t tep);
260 void nrfx_gppi_channel_endpoints_clear(uint8_t channel, uint32_t eep, uint32_t tep);
269 void nrfx_gppi_event_endpoint_clear(uint8_t channel, uint32_t eep);
278 void nrfx_gppi_task_endpoint_clear(uint8_t channel, uint32_t tep);
288 void nrfx_gppi_fork_endpoint_setup(uint8_t channel, uint32_t fork_tep);
297 void nrfx_gppi_fork_endpoint_clear(uint8_t channel, uint32_t fork_tep);
394 nrfx_err_t nrfx_gppi_channel_free(uint8_t channel);
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| /hal_nordic-3.4.0/nrfx/drivers/src/ |
| D | nrfx_ppi.c | 72 static bool is_programmable_app_channel(nrf_ppi_channel_t channel) in is_programmable_app_channel() argument
74 return ((NRFX_PPI_PROG_APP_CHANNELS_MASK & nrfx_ppi_channel_to_mask(channel)) != 0); in is_programmable_app_channel()
100 static bool is_app_channel(nrf_ppi_channel_t channel) in is_app_channel() argument
102 return are_app_channels(nrfx_ppi_channel_to_mask(channel)); in is_app_channel()
148 nrfx_err_t nrfx_ppi_channel_free(nrf_ppi_channel_t channel) in nrfx_ppi_channel_free() argument
150 if (!is_programmable_app_channel(channel)) in nrfx_ppi_channel_free()
155 nrf_ppi_channel_disable(NRF_PPI, channel); in nrfx_ppi_channel_free()
157 return nrfx_flag32_free(&m_channels_allocated, channel); in nrfx_ppi_channel_free()
161 nrfx_err_t nrfx_ppi_channel_assign(nrf_ppi_channel_t channel, uint32_t eep, uint32_t tep) in nrfx_ppi_channel_assign() argument
170 if (!is_programmable_app_channel(channel)) in nrfx_ppi_channel_assign()
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| D | nrfx_dppi.c | 106 nrfx_err_t nrfx_dppi_channel_free(uint8_t channel) in nrfx_dppi_channel_free() argument
108 nrfy_dppi_channels_disable(NRF_DPPIC, NRFX_BIT(channel)); in nrfx_dppi_channel_free()
109 return nrfx_flag32_free(&m_allocated_channels, channel); in nrfx_dppi_channel_free()
112 nrfx_err_t nrfx_dppi_channel_enable(uint8_t channel) in nrfx_dppi_channel_enable() argument
116 if (!nrfx_flag32_is_allocated(m_allocated_channels, channel)) in nrfx_dppi_channel_enable()
122 nrfy_dppi_channels_enable(NRF_DPPIC, DPPI_BIT_SET(channel)); in nrfx_dppi_channel_enable()
128 nrfx_err_t nrfx_dppi_channel_disable(uint8_t channel) in nrfx_dppi_channel_disable() argument
132 if (!nrfx_flag32_is_allocated(m_allocated_channels, channel)) in nrfx_dppi_channel_disable()
138 nrfy_dppi_channels_disable(NRF_DPPIC, DPPI_BIT_SET(channel)); in nrfx_dppi_channel_disable()
156 nrfx_err_t nrfx_dppi_channel_include_in_group(uint8_t channel, in nrfx_dppi_channel_include_in_group() argument
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| D | nrfx_rtc.c | 137 nrfx_err_t nrfx_rtc_cc_disable(nrfx_rtc_t const * p_instance, uint32_t channel) in nrfx_rtc_cc_disable() argument
140 NRFX_ASSERT(channel < p_instance->cc_channel_count); in nrfx_rtc_cc_disable()
143 uint32_t int_mask = NRF_RTC_CHANNEL_INT_MASK(channel); in nrfx_rtc_cc_disable()
144 nrf_rtc_event_t event = NRF_RTC_CHANNEL_EVENT_ADDR(channel); in nrfx_rtc_cc_disable()
162 (unsigned long)channel); in nrfx_rtc_cc_disable()
169 uint32_t channel, in nrfx_rtc_cc_set() argument
174 NRFX_ASSERT(channel < p_instance->cc_channel_count); in nrfx_rtc_cc_set()
177 uint32_t int_mask = NRF_RTC_CHANNEL_INT_MASK(channel); in nrfx_rtc_cc_set()
178 nrf_rtc_event_t event = NRF_RTC_CHANNEL_EVENT_ADDR(channel); in nrfx_rtc_cc_set()
185 nrfy_rtc_cc_set(p_instance->p_reg, channel, val); in nrfx_rtc_cc_set()
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| D | nrfx_saadc.c | 161 uint8_t channel = NRF_CTZ(channel_mask); in saadc_channels_deconfig() local
163 channel_mask &= ~(1 << channel); in saadc_channels_deconfig()
164 m_cb.channels_configured &= ~(1 << channel); in saadc_channels_deconfig()
166 m_cb.channels_input[channel].input_p = NRF_SAADC_INPUT_DISABLED; in saadc_channels_deconfig()
167 m_cb.channels_input[channel].input_n = NRF_SAADC_INPUT_DISABLED; in saadc_channels_deconfig()
175 uint8_t channel = NRF_CTZ(channel_mask); in saadc_channels_disable() local
176 channel_mask &= ~(1 << channel); in saadc_channels_disable()
177 nrfy_saadc_channel_input_set(NRF_SAADC, channel, in saadc_channels_disable()
625 nrfx_err_t nrfx_saadc_limits_set(uint8_t channel, int16_t limit_low, int16_t limit_high) in nrfx_saadc_limits_set() argument
641 if (!(m_cb.channels_activated & (1 << channel))) in nrfx_saadc_limits_set()
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| /hal_nordic-3.4.0/nrfx/hal/ |
| D | nrf_ppi.h | 147 NRF_STATIC_INLINE void nrf_ppi_channel_enable(NRF_PPI_Type * p_reg, nrf_ppi_channel_t channel);
157 NRF_STATIC_INLINE void nrf_ppi_channel_disable(NRF_PPI_Type * p_reg, nrf_ppi_channel_t channel);
172 nrf_ppi_channel_t channel);
206 nrf_ppi_channel_t channel,
218 nrf_ppi_channel_t channel,
229 nrf_ppi_channel_t channel,
242 nrf_ppi_channel_t channel,
255 nrf_ppi_channel_t channel,
271 nrf_ppi_channel_t channel,
297 nrf_ppi_channel_t channel,
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| D | nrf_saadc.h | 446 uint8_t channel);
468 uint8_t channel);
489 NRF_STATIC_INLINE nrf_saadc_event_t nrf_saadc_limit_event_get(uint8_t channel,
501 uint8_t channel,
513 uint8_t channel,
525 uint8_t channel,
571 NRF_STATIC_INLINE uint32_t nrf_saadc_limit_int_get(uint8_t channel,
764 uint8_t channel,
775 uint8_t channel,
833 uint8_t channel) in nrf_saadc_subscribe_set() argument
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| D | nrf_egu.h | 171 NRF_STATIC_INLINE nrf_egu_task_t nrf_egu_trigger_task_get(uint8_t channel);
210 NRF_STATIC_INLINE nrf_egu_event_t nrf_egu_triggered_event_get(uint8_t channel);
245 NRF_STATIC_INLINE nrf_egu_int_mask_t nrf_egu_channel_int_get(uint8_t channel);
258 uint8_t channel);
280 uint8_t channel);
316 NRF_STATIC_INLINE nrf_egu_task_t nrf_egu_trigger_task_get(uint8_t channel) in nrf_egu_trigger_task_get() argument
318 return (nrf_egu_task_t)NRFX_OFFSETOF(NRF_EGU_Type, TASKS_TRIGGER[channel]); in nrf_egu_trigger_task_get()
341 NRF_STATIC_INLINE nrf_egu_event_t nrf_egu_triggered_event_get(uint8_t channel) in nrf_egu_triggered_event_get() argument
343 return (nrf_egu_event_t)NRFX_OFFSETOF(NRF_EGU_Type, EVENTS_TRIGGERED[channel]); in nrf_egu_triggered_event_get()
364 NRF_STATIC_INLINE nrf_egu_int_mask_t nrf_egu_channel_int_get(uint8_t channel) in nrf_egu_channel_int_get() argument
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| D | nrf_timer.h | 518 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_clear_get(uint8_t channel);
527 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_stop_get(uint8_t channel);
568 uint8_t channel);
590 uint8_t channel);
668 NRF_STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint8_t channel);
677 NRF_STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint8_t channel);
686 NRF_STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint8_t channel);
784 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_clear_get(uint8_t channel) in nrf_timer_short_compare_clear_get() argument
786 return (nrf_timer_short_mask_t)((uint32_t)NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK << channel); in nrf_timer_short_compare_clear_get()
789 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_stop_get(uint8_t channel) in nrf_timer_short_compare_stop_get() argument
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| D | nrf_dppi.h | 177 NRF_STATIC_INLINE bool nrf_dppi_channel_check(NRF_DPPIC_Type const * p_reg, uint8_t channel);
221 uint8_t channel);
356 NRF_STATIC_INLINE bool nrf_dppi_channel_check(NRF_DPPIC_Type const * p_reg, uint8_t channel) in nrf_dppi_channel_check() argument
358 NRFX_ASSERT(channel < nrf_dppi_channel_number_get(p_reg)); in nrf_dppi_channel_check()
359 return ((p_reg->CHEN & (DPPIC_CHEN_CH0_Enabled << (DPPIC_CHEN_CH0_Pos + channel))) != 0); in nrf_dppi_channel_check()
379 uint8_t channel) in nrf_dppi_subscribe_set() argument
381 NRFX_ASSERT(channel < nrf_dppi_channel_number_get(p_reg)); in nrf_dppi_subscribe_set()
383 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_dppi_subscribe_set()
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| D | nrf_rng.h | 205 uint8_t channel);
227 uint8_t channel);
314 uint8_t channel) in nrf_rng_subscribe_set() argument
317 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_rng_subscribe_set()
328 uint8_t channel) in nrf_rng_publish_set() argument
331 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_rng_publish_set()
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| D | nrf_aar.h | 274 uint8_t channel);
296 uint8_t channel);
413 uint8_t channel) in nrf_aar_subscribe_set() argument
416 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_aar_subscribe_set()
427 uint8_t channel) in nrf_aar_publish_set() argument
430 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_aar_publish_set()
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| D | nrf_pwm.h | 408 uint8_t channel);
430 uint8_t channel);
478 NRF_STATIC_INLINE uint32_t nrf_pwm_pin_get(NRF_PWM_Type const * p_reg, uint8_t channel);
666 uint8_t channel) in nrf_pwm_subscribe_set() argument
669 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_pwm_subscribe_set()
680 uint8_t channel) in nrf_pwm_publish_set() argument
683 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_pwm_publish_set()
713 NRF_STATIC_INLINE uint32_t nrf_pwm_pin_get(NRF_PWM_Type const * p_reg, uint8_t channel) in nrf_pwm_pin_get() argument
715 NRFX_ASSERT(channel < NRF_PWM_CHANNEL_COUNT); in nrf_pwm_pin_get()
716 return p_reg->PSEL.OUT[channel]; in nrf_pwm_pin_get()
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| /hal_nordic-3.4.0/nrfx/drivers/include/ |
| D | nrfx_ppi.h | 105 nrfx_err_t nrfx_ppi_channel_free(nrf_ppi_channel_t channel);
118 nrfx_err_t nrfx_ppi_channel_assign(nrf_ppi_channel_t channel, uint32_t eep, uint32_t tep);
130 nrfx_err_t nrfx_ppi_channel_fork_assign(nrf_ppi_channel_t channel, uint32_t fork_tep);
141 nrfx_err_t nrfx_ppi_channel_enable(nrf_ppi_channel_t channel);
152 nrfx_err_t nrfx_ppi_channel_disable(nrf_ppi_channel_t channel);
187 NRFX_STATIC_INLINE uint32_t nrfx_ppi_channel_to_mask(nrf_ppi_channel_t channel);
214 NRFX_STATIC_INLINE nrfx_err_t nrfx_ppi_channel_include_in_group(nrf_ppi_channel_t channel,
242 NRFX_STATIC_INLINE nrfx_err_t nrfx_ppi_channel_remove_from_group(nrf_ppi_channel_t channel,
306 NRFX_STATIC_INLINE uint32_t nrfx_ppi_channel_to_mask(nrf_ppi_channel_t channel) in nrfx_ppi_channel_to_mask() argument
308 return (1uL << (uint32_t) channel); in nrfx_ppi_channel_to_mask()
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| D | nrfx_dppi.h | 79 nrfx_err_t nrfx_dppi_channel_free(uint8_t channel);
89 nrfx_err_t nrfx_dppi_channel_enable(uint8_t channel);
102 nrfx_err_t nrfx_dppi_channel_disable(uint8_t channel);
142 nrfx_err_t nrfx_dppi_channel_include_in_group(uint8_t channel,
157 nrfx_err_t nrfx_dppi_channel_remove_from_group(uint8_t channel,
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| D | nrfx_timer.h | 237 uint32_t channel);
259 uint32_t channel);
343 uint32_t channel);
352 uint32_t channel);
362 uint32_t channel) in nrfx_timer_capture_task_address_get() argument
364 NRFX_ASSERT(channel < p_instance->cc_channel_count); in nrfx_timer_capture_task_address_get()
365 return nrfy_timer_task_address_get(p_instance->p_reg, nrfy_timer_capture_task_get(channel)); in nrfx_timer_capture_task_address_get()
375 uint32_t channel) in nrfx_timer_compare_event_address_get() argument
377 NRFX_ASSERT(channel < p_instance->cc_channel_count); in nrfx_timer_compare_event_address_get()
378 return nrfy_timer_event_address_get(p_instance->p_reg, nrfy_timer_compare_event_get(channel)); in nrfx_timer_compare_event_address_get()
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| /hal_nordic-3.4.0/drivers/nrf_802154/driver/src/ |
| D | nrf_802154_tx_power.c | 41 uint8_t channel, in nrf_802154_tx_power_convert_metadata_to_tx_power_split() argument
48 return nrf_802154_fal_tx_power_split(channel, power_unconstrained, p_tx_power_split); in nrf_802154_tx_power_convert_metadata_to_tx_power_split()
60 uint8_t channel, in nrf_802154_tx_power_split_pib_power_for_channel_get() argument
63 return nrf_802154_fal_tx_power_split(channel, in nrf_802154_tx_power_split_pib_power_for_channel_get()
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| D | nrf_802154_tx_power.h | 56 uint8_t channel,
83 uint8_t channel,
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| D | nrf_802154_pib.c | 98 …uint8_t channel : 5; ///< Channel on which the node recei… member
183 m_data.channel = 11; in nrf_802154_pib_init()
248 return m_data.channel; in nrf_802154_pib_channel_get()
251 void nrf_802154_pib_channel_set(uint8_t channel) in nrf_802154_pib_channel_set() argument
253 m_data.channel = channel; in nrf_802154_pib_channel_set()
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| /hal_nordic-3.4.0/nrfx/haly/ |
| D | nrfy_timer.h | 162 nrf_timer_cc_channel_t channel) in nrfy_timer_capture_get() argument
164 nrf_timer_task_trigger(p_reg, nrf_timer_capture_task_get(channel)); in nrfy_timer_capture_get()
166 uint32_t cc = nrf_timer_cc_get(p_reg, channel); in nrfy_timer_capture_get()
265 uint8_t channel) in nrfy_timer_subscribe_set() argument
267 nrf_timer_subscribe_set(p_reg, task, channel); in nrfy_timer_subscribe_set()
282 uint8_t channel) in nrfy_timer_publish_set() argument
284 nrf_timer_publish_set(p_reg, event, channel); in nrfy_timer_publish_set()
367 NRFY_STATIC_INLINE nrf_timer_task_t nrfy_timer_capture_task_get(uint8_t channel) in nrfy_timer_capture_task_get() argument
369 return nrf_timer_capture_task_get(channel); in nrfy_timer_capture_task_get()
373 NRFY_STATIC_INLINE nrf_timer_event_t nrfy_timer_compare_event_get(uint8_t channel) in nrfy_timer_compare_event_get() argument
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| D | nrfy_saadc.h | 189 uint8_t channel, in nrfy_saadc_channel_configure() argument
195 nrf_saadc_channel_init(p_reg, channel, p_config); in nrfy_saadc_channel_configure()
199 nrf_saadc_channel_input_set(p_reg, channel, p_input->input_p, p_input->input_n); in nrfy_saadc_channel_configure()
353 uint8_t channel) in nrfy_saadc_subscribe_set() argument
355 nrf_saadc_subscribe_set(p_reg, task, channel); in nrfy_saadc_subscribe_set()
369 uint8_t channel) in nrfy_saadc_publish_set() argument
371 nrf_saadc_publish_set(p_reg, event, channel); in nrfy_saadc_publish_set()
384 NRFY_STATIC_INLINE nrf_saadc_event_t nrfy_saadc_limit_event_get(uint8_t channel, in nrfy_saadc_limit_event_get() argument
387 return nrf_saadc_limit_event_get(channel, limit_type); in nrfy_saadc_limit_event_get()
392 uint8_t channel, in nrfy_saadc_channel_input_set() argument
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| D | nrfy_dppi.h | 102 NRFY_STATIC_INLINE bool nrfy_dppi_channel_check(NRF_DPPIC_Type const * p_reg, uint8_t channel) in nrfy_dppi_channel_check() argument
105 bool check = nrf_dppi_channel_check(p_reg, channel); in nrfy_dppi_channel_check()
134 uint8_t channel) in nrfy_dppi_subscribe_set() argument
136 nrf_dppi_subscribe_set(p_reg, task, channel); in nrfy_dppi_subscribe_set()
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| /hal_nordic-3.4.0/nrfx/samples/src/nrfx_egu/ |
| D | README.md | 19 @p egu_handler() is then executed once for each triggered channel with a relevant log message.
38 - "EGU handler triggered on channel: 0. Context passed to the handler: >Some context<"
39 - "EGU handler triggered on channel: 1. Context passed to the handler: >Some context<"
40 - "EGU handler triggered on channel: 2. Context passed to the handler: >Some context<"
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