Searched refs:WDT_RREN_RR5_Pos (Results 1 – 12 of 12) sorted by relevance
6064 #define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */ macro6065 #define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */
10306 #define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */ macro10307 #define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */
11135 #define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */ macro11136 #define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */
11054 #define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */ macro11055 #define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */
12019 #define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */ macro12020 #define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */
11314 #define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */ macro11315 #define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */
12705 #define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */ macro12706 #define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */
12061 #define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */ macro12062 #define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */
14664 #define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */ macro14665 #define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */
17401 #define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */ macro17402 #define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */
17050 #define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */ macro17051 #define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */
19039 #define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */ macro19040 #define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */
