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Searched refs:SAADC_CH_CONFIG_RESN_Pos (Results 1 – 10 of 10) sorted by relevance

/hal_nordic-3.4.0/nrfx/hal/
Dnrf_saadc.h1077 | ((config->resistor_n << SAADC_CH_CONFIG_RESN_Pos) & SAADC_CH_CONFIG_RESN_Msk) in nrf_saadc_channel_init()
/hal_nordic-3.4.0/nrfx/mdk/
Dnrf52805_bitfields.h6844 #define SAADC_CH_CONFIG_RESN_Pos (4UL) /*!< Position of RESN field. */ macro
6845 #define SAADC_CH_CONFIG_RESN_Msk (0x3UL << SAADC_CH_CONFIG_RESN_Pos) /*!< Bit mask of RESN field. */
Dnrf9120_bitfields.h6823 #define SAADC_CH_CONFIG_RESN_Pos (4UL) /*!< Position of RESN field. */ macro
6824 #define SAADC_CH_CONFIG_RESN_Msk (0x3UL << SAADC_CH_CONFIG_RESN_Pos) /*!< Bit mask of RESN field. */
Dnrf9160_bitfields.h6745 #define SAADC_CH_CONFIG_RESN_Pos (4UL) /*!< Position of RESN field. */ macro
6746 #define SAADC_CH_CONFIG_RESN_Msk (0x3UL << SAADC_CH_CONFIG_RESN_Pos) /*!< Bit mask of RESN field. */
Dnrf52811_bitfields.h8557 #define SAADC_CH_CONFIG_RESN_Pos (4UL) /*!< Position of RESN field. */ macro
8558 #define SAADC_CH_CONFIG_RESN_Msk (0x3UL << SAADC_CH_CONFIG_RESN_Pos) /*!< Bit mask of RESN field. */
Dnrf52810_bitfields.h7852 #define SAADC_CH_CONFIG_RESN_Pos (4UL) /*!< Position of RESN field. */ macro
7853 #define SAADC_CH_CONFIG_RESN_Msk (0x3UL << SAADC_CH_CONFIG_RESN_Pos) /*!< Bit mask of RESN field. */
Dnrf52_bitfields.h11296 #define SAADC_CH_CONFIG_RESN_Pos (4UL) /*!< Position of RESN field. */ macro
11297 #define SAADC_CH_CONFIG_RESN_Msk (0x3UL << SAADC_CH_CONFIG_RESN_Pos) /*!< Bit mask of RESN field. */
Dnrf52840_bitfields.h12351 #define SAADC_CH_CONFIG_RESN_Pos (4UL) /*!< Position of RESN field. */ macro
12352 #define SAADC_CH_CONFIG_RESN_Msk (0x3UL << SAADC_CH_CONFIG_RESN_Pos) /*!< Bit mask of RESN field. */
Dnrf52833_bitfields.h11988 #define SAADC_CH_CONFIG_RESN_Pos (4UL) /*!< Position of RESN field. */ macro
11989 #define SAADC_CH_CONFIG_RESN_Msk (0x3UL << SAADC_CH_CONFIG_RESN_Pos) /*!< Bit mask of RESN field. */
Dnrf5340_application_bitfields.h12149 #define SAADC_CH_CONFIG_RESN_Pos (4UL) /*!< Position of RESN field. */ macro
12150 #define SAADC_CH_CONFIG_RESN_Msk (0x3UL << SAADC_CH_CONFIG_RESN_Pos) /*!< Bit mask of RESN field. */