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Searched refs:PPI_CHENSET_CH0_Pos (Results 1 – 8 of 8) sorted by relevance

/hal_nordic-3.4.0/nrfx/mdk/
Dnrf51_bitfields.h3629 #define PPI_CHENSET_CH0_Pos (0UL) /*!< Position of CH0 field. */ macro
3630 #define PPI_CHENSET_CH0_Msk (0x1UL << PPI_CHENSET_CH0_Pos) /*!< Bit mask of CH0 field. */
Dnrf52805_bitfields.h4210 #define PPI_CHENSET_CH0_Pos (0UL) /*!< Position of CH0 field. */ macro
4211 #define PPI_CHENSET_CH0_Msk (0x1UL << PPI_CHENSET_CH0_Pos) /*!< Bit mask of CH0 field. */
Dnrf52811_bitfields.h4833 #define PPI_CHENSET_CH0_Pos (0UL) /*!< Position of CH0 field. */ macro
4834 #define PPI_CHENSET_CH0_Msk (0x1UL << PPI_CHENSET_CH0_Pos) /*!< Bit mask of CH0 field. */
Dnrf52810_bitfields.h4833 #define PPI_CHENSET_CH0_Pos (0UL) /*!< Position of CH0 field. */ macro
4834 #define PPI_CHENSET_CH0_Msk (0x1UL << PPI_CHENSET_CH0_Pos) /*!< Bit mask of CH0 field. */
Dnrf52820_bitfields.h4568 #define PPI_CHENSET_CH0_Pos (0UL) /*!< Position of CH0 field. */ macro
4569 #define PPI_CHENSET_CH0_Msk (0x1UL << PPI_CHENSET_CH0_Pos) /*!< Bit mask of CH0 field. */
Dnrf52_bitfields.h8276 #define PPI_CHENSET_CH0_Pos (0UL) /*!< Position of CH0 field. */ macro
8277 #define PPI_CHENSET_CH0_Msk (0x1UL << PPI_CHENSET_CH0_Pos) /*!< Bit mask of CH0 field. */
Dnrf52840_bitfields.h8360 #define PPI_CHENSET_CH0_Pos (0UL) /*!< Position of CH0 field. */ macro
8361 #define PPI_CHENSET_CH0_Msk (0x1UL << PPI_CHENSET_CH0_Pos) /*!< Bit mask of CH0 field. */
Dnrf52833_bitfields.h8236 #define PPI_CHENSET_CH0_Pos (0UL) /*!< Position of CH0 field. */ macro
8237 #define PPI_CHENSET_CH0_Msk (0x1UL << PPI_CHENSET_CH0_Pos) /*!< Bit mask of CH0 field. */