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Searched refs:PPI_CHENCLR_CH31_Disabled (Results 1 – 8 of 8) sorted by relevance

/hal_nordic-3.4.0/nrfx/mdk/
Dnrf51_bitfields.h3641 #define PPI_CHENCLR_CH31_Disabled (0UL) /*!< Channel disabled. */ macro
Dnrf52805_bitfields.h4222 #define PPI_CHENCLR_CH31_Disabled (0UL) /*!< Read: channel disabled */ macro
Dnrf52811_bitfields.h4845 #define PPI_CHENCLR_CH31_Disabled (0UL) /*!< Read: channel disabled */ macro
Dnrf52810_bitfields.h4845 #define PPI_CHENCLR_CH31_Disabled (0UL) /*!< Read: channel disabled */ macro
Dnrf52820_bitfields.h4580 #define PPI_CHENCLR_CH31_Disabled (0UL) /*!< Read: channel disabled */ macro
Dnrf52_bitfields.h8288 #define PPI_CHENCLR_CH31_Disabled (0UL) /*!< Read: channel disabled */ macro
Dnrf52840_bitfields.h8372 #define PPI_CHENCLR_CH31_Disabled (0UL) /*!< Read: channel disabled */ macro
Dnrf52833_bitfields.h8248 #define PPI_CHENCLR_CH31_Disabled (0UL) /*!< Read: channel disabled */ macro