1 /*
2 * Copyright (c) 2014 - 2023, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice, this
11 * list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived from this
19 * software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef NRF_TIMER_H__
35 #define NRF_TIMER_H__
36
37 #include <nrfx.h>
38
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42
43 /**
44 * @defgroup nrf_timer_hal TIMER HAL
45 * @{
46 * @ingroup nrf_timer
47 * @brief Hardware access layer for managing the TIMER peripheral.
48 */
49
50 /**
51 * @brief Macro getting pointer to the structure of registers of the TIMER peripheral.
52 *
53 * @param[in] idx TIMER instance index.
54 *
55 * @return Pointer to the structure of registers of the TIMER peripheral.
56 */
57 #define NRF_TIMER_INST_GET(idx) NRFX_CONCAT_2(NRF_TIMER, idx)
58
59 #if defined(TIMER_INTENSET_COMPARE4_Msk) || defined(__NRFX_DOXYGEN__)
60 /** @brief Symbol indicating whether timer has capture/compare channel 4. */
61 #define NRF_TIMER_HAS_CC4 1
62 #else
63 #define NRF_TIMER_HAS_CC4 0
64 #endif
65
66 #if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__)
67 /** @brief Symbol indicating whether timer has capture/compare channel 5. */
68 #define NRF_TIMER_HAS_CC5 1
69 #else
70 #define NRF_TIMER_HAS_CC5 0
71 #endif
72
73 #if defined(TIMER_INTENSET_COMPARE6_Msk) || defined(__NRFX_DOXYGEN__)
74 /** @brief Symbol indicating whether timer has capture/compare channel 6. */
75 #define NRF_TIMER_HAS_CC6 1
76 #else
77 #define NRF_TIMER_HAS_CC6 0
78 #endif
79
80 #if defined(TIMER_INTENSET_COMPARE7_Msk) || defined(__NRFX_DOXYGEN__)
81 /** @brief Symbol indicating whether timer has capture/compare channel 7. */
82 #define NRF_TIMER_HAS_CC7 1
83 #else
84 #define NRF_TIMER_HAS_CC7 0
85 #endif
86
87 #if defined(TIMER_MODE_MODE_LowPowerCounter) || defined(__NRFX_DOXYGEN__)
88 /** @brief Symbol indicating whether timer supports low power mode. */
89 #define NRF_TIMER_HAS_LOW_POWER_MODE 1
90 #else
91 #define NRF_TIMER_HAS_LOW_POWER_MODE 0
92 #endif
93
94 #if defined(TIMER_ONESHOTEN_ONESHOTEN_Msk) || defined(__NRFX_DOXYGEN__)
95 /** @brief Symbol indicating whether timer supports one-shot operation. */
96 #define NRF_TIMER_HAS_ONE_SHOT 1
97 #else
98 #define NRF_TIMER_HAS_ONE_SHOT 0
99 #endif
100
101 /** @brief Base frequency value 320 MHz for TIMER. */
102 #define NRF_TIMER_BASE_FREQUENCY_320MHZ (NRFX_MHZ_TO_HZ(320UL))
103 /** @brief Base frequency value 64 MHz for TIMER. */
104 #define NRF_TIMER_BASE_FREQUENCY_64MHZ (NRFX_MHZ_TO_HZ(64UL))
105 /** @brief Base frequency value 32 MHz for TIMER. */
106 #define NRF_TIMER_BASE_FREQUENCY_32MHZ (NRFX_MHZ_TO_HZ(32UL))
107 /** @brief Base frequency value 16 MHz for TIMER. */
108 #define NRF_TIMER_BASE_FREQUENCY_16MHZ (NRFX_MHZ_TO_HZ(16UL))
109
110 #if !defined(NRF_TIMER_PRESCALER_MAX)
111 /** @brief Maximum value of PRESCALER register. */
112 #define NRF_TIMER_PRESCALER_MAX 9
113 #endif
114
115 /**
116 * @brief Macro for getting the maximum bit resolution of the specified timer instance.
117 *
118 * @param[in] id Index of the specified timer instance.
119 *
120 * @retval Maximum bit resolution of the specified timer instance.
121 */
122 #define TIMER_MAX_SIZE(id) NRFX_CONCAT_3(TIMER, id, _MAX_SIZE)
123
124 /**
125 * @brief Macro for validating the correctness of the bit width resolution setting.
126 *
127 * @param[in] id Index of the specified timer instance.
128 * @param[in] bit_width Bit width resolution value to be checked.
129 *
130 * @retval true Timer instance supports the specified bit width resolution value.
131 * @retval false Timer instance does not support the specified bit width resolution value.
132 */
133 #define TIMER_BIT_WIDTH_MAX(id, bit_width) \
134 (TIMER_MAX_SIZE(id) == 8 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) : \
135 (TIMER_MAX_SIZE(id) == 16 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \
136 (bit_width == NRF_TIMER_BIT_WIDTH_16) : \
137 (TIMER_MAX_SIZE(id) == 24 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \
138 (bit_width == NRF_TIMER_BIT_WIDTH_16) || \
139 (bit_width == NRF_TIMER_BIT_WIDTH_24) : \
140 (TIMER_MAX_SIZE(id) == 32 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \
141 (bit_width == NRF_TIMER_BIT_WIDTH_16) || \
142 (bit_width == NRF_TIMER_BIT_WIDTH_24) || \
143 (bit_width == NRF_TIMER_BIT_WIDTH_32) : \
144 false))))
145
146 /**
147 * @brief Macro for checking correctness of bit width configuration for the specified timer.
148 *
149 * @param[in] p_reg Timer instance register.
150 * @param[in] bit_width Bit width resolution value to be checked.
151 *
152 * @retval true Timer instance supports the specified bit width resolution value.
153 * @retval false Timer instance does not support the specified bit width resolution value.
154 */
155 #if !defined(NRF_TIMER_IS_BIT_WIDTH_VALID)
156 #if (TIMER_COUNT == 3) || defined(__NRFX_DOXYGEN__)
157 #define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) ( \
158 ((p_reg == NRF_TIMER0) && TIMER_BIT_WIDTH_MAX(0, bit_width)) \
159 || ((p_reg == NRF_TIMER1) && TIMER_BIT_WIDTH_MAX(1, bit_width)) \
160 || ((p_reg == NRF_TIMER2) && TIMER_BIT_WIDTH_MAX(2, bit_width)))
161 #elif (TIMER_COUNT == 4)
162 #define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) ( \
163 ((p_reg == NRF_TIMER0) && TIMER_BIT_WIDTH_MAX(0, bit_width)) \
164 || ((p_reg == NRF_TIMER1) && TIMER_BIT_WIDTH_MAX(1, bit_width)) \
165 || ((p_reg == NRF_TIMER2) && TIMER_BIT_WIDTH_MAX(2, bit_width)) \
166 || ((p_reg == NRF_TIMER3) && TIMER_BIT_WIDTH_MAX(3, bit_width)))
167 #elif (TIMER_COUNT == 5)
168 #define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) ( \
169 ((p_reg == NRF_TIMER0) && TIMER_BIT_WIDTH_MAX(0, bit_width)) \
170 || ((p_reg == NRF_TIMER1) && TIMER_BIT_WIDTH_MAX(1, bit_width)) \
171 || ((p_reg == NRF_TIMER2) && TIMER_BIT_WIDTH_MAX(2, bit_width)) \
172 || ((p_reg == NRF_TIMER3) && TIMER_BIT_WIDTH_MAX(3, bit_width)) \
173 || ((p_reg == NRF_TIMER4) && TIMER_BIT_WIDTH_MAX(4, bit_width)))
174 #else
175 #error "Not supported timer count"
176 #endif
177 #endif
178
179 #if !defined(NRF_TIMER_IS_320MHZ_TIMER)
180 /** @brief Macro for checking whether the base frequency for the specified timer is 320 MHz. */
181 #define NRF_TIMER_IS_320MHZ_TIMER(p_reg) false
182 #endif
183
184 #if !defined(NRF_TIMER_IS_64MHZ_TIMER)
185 /** @brief Macro for checking whether the base frequency for the specified timer is 64 MHz. */
186 #define NRF_TIMER_IS_64MHZ_TIMER(p_reg) false
187 #endif
188
189 #if !defined(NRF_TIMER_IS_32MHZ_TIMER)
190 /** @brief Macro for checking whether the base frequency for the specified timer is 32 MHz. */
191 #define NRF_TIMER_IS_32MHZ_TIMER(p_reg) false
192 #endif
193
194 #if !defined(NRF_TIMER_IS_16MHZ_TIMER)
195 /** @brief Macro for checking whether the base frequency for the specified timer is 16 MHz. */
196 #define NRF_TIMER_IS_16MHZ_TIMER(p_reg) true
197 #endif
198
199 /**
200 * @brief Macro for getting base frequency value in Hz for the specified timer.
201 *
202 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
203 */
204 #define NRF_TIMER_BASE_FREQUENCY_GET(p_reg) \
205 ((NRF_TIMER_IS_320MHZ_TIMER(p_reg)) ? (NRF_TIMER_BASE_FREQUENCY_320MHZ): \
206 ((NRF_TIMER_IS_64MHZ_TIMER(p_reg)) ? (NRF_TIMER_BASE_FREQUENCY_64MHZ): \
207 ((NRF_TIMER_IS_16MHZ_TIMER(p_reg)) ? (NRF_TIMER_BASE_FREQUENCY_16MHZ) : \
208 (NRF_TIMER_BASE_FREQUENCY_32MHZ))))
209
210 /**
211 * @brief Macro for computing prescaler value for given base frequency and desired frequency.
212 *
213 * @warning Not every combination of base frequency and desired frequency is supported.
214 *
215 * @param[in] base_freq Base clock frequency for timer in Hz.
216 * @param[in] frequency Desired frequency value in Hz.
217 */
218 #define NRF_TIMER_PRESCALER_CALCULATE(base_freq, frequency) \
219 NRF_CTZ((uint32_t)(base_freq) / (uint32_t)(frequency))
220
221 /**
222 * @brief Macro for checking whether specified frequency can be achived for given timer instance.
223 *
224 * @note Macro is using compile time assertion.
225 *
226 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
227 * @param[in] frequency Desired frequency value in Hz.
228 */
229 #define NRF_TIMER_FREQUENCY_STATIC_CHECK(p_reg, frequency) \
230 NRFX_STATIC_ASSERT( \
231 (NRF_TIMER_BASE_FREQUENCY_GET(p_reg) == frequency) || \
232 ((NRF_TIMER_BASE_FREQUENCY_GET(p_reg) % frequency == 0) && \
233 NRFX_IS_POWER_OF_TWO(NRF_TIMER_BASE_FREQUENCY_GET(p_reg) / (uint32_t)frequency) && \
234 ((NRF_TIMER_BASE_FREQUENCY_GET(p_reg) / frequency) <= (1 << NRF_TIMER_PRESCALER_MAX))), \
235 "Specified frequency can not be achived with given TIMER instance.")
236
237 /**
238 * @brief Macro for getting the number of capture/compare channels available
239 * in a given timer instance.
240 *
241 * @param[in] id Index of the specified timer instance.
242 */
243 #define NRF_TIMER_CC_CHANNEL_COUNT(id) NRFX_CONCAT_3(TIMER, id, _CC_NUM)
244
245 /** @brief Symbol specifying maximum number of available compare channels. */
246 #define NRF_TIMER_CC_COUNT_MAX NRFX_ARRAY_SIZE(((NRF_TIMER_Type*)0)->EVENTS_COMPARE)
247
248 /** @brief Symbol for creating the interrupt bitmask for all compare channels. */
249 #define NRF_TIMER_ALL_CHANNELS_INT_MASK \
250 ((uint32_t)((1 << NRF_TIMER_CC_COUNT_MAX) - 1) << TIMER_INTENSET_COMPARE0_Pos)
251
252 /** @brief Timer tasks. */
253 typedef enum
254 {
255 NRF_TIMER_TASK_START = offsetof(NRF_TIMER_Type, TASKS_START), ///< Task for starting the timer.
256 NRF_TIMER_TASK_STOP = offsetof(NRF_TIMER_Type, TASKS_STOP), ///< Task for stopping the timer.
257 NRF_TIMER_TASK_COUNT = offsetof(NRF_TIMER_Type, TASKS_COUNT), ///< Task for incrementing the timer (in counter mode).
258 NRF_TIMER_TASK_CLEAR = offsetof(NRF_TIMER_Type, TASKS_CLEAR), ///< Task for resetting the timer value.
259 NRF_TIMER_TASK_SHUTDOWN = offsetof(NRF_TIMER_Type, TASKS_SHUTDOWN), ///< Task for powering off the timer.
260 NRF_TIMER_TASK_CAPTURE0 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[0]), ///< Task for capturing the timer value on channel 0.
261 NRF_TIMER_TASK_CAPTURE1 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[1]), ///< Task for capturing the timer value on channel 1.
262 NRF_TIMER_TASK_CAPTURE2 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[2]), ///< Task for capturing the timer value on channel 2.
263 NRF_TIMER_TASK_CAPTURE3 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[3]), ///< Task for capturing the timer value on channel 3.
264 #if NRF_TIMER_HAS_CC4
265 NRF_TIMER_TASK_CAPTURE4 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[4]), ///< Task for capturing the timer value on channel 4.
266 #endif
267 #if NRF_TIMER_HAS_CC5
268 NRF_TIMER_TASK_CAPTURE5 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[5]), ///< Task for capturing the timer value on channel 5.
269 #endif
270 #if NRF_TIMER_HAS_CC6
271 NRF_TIMER_TASK_CAPTURE6 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[6]), ///< Task for capturing the timer value on channel 6.
272 #endif
273 #if NRF_TIMER_HAS_CC7
274 NRF_TIMER_TASK_CAPTURE7 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[7]), ///< Task for capturing the timer value on channel 7.
275 #endif
276 } nrf_timer_task_t;
277
278 /** @brief Timer events. */
279 typedef enum
280 {
281 NRF_TIMER_EVENT_COMPARE0 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[0]), ///< Event from compare channel 0.
282 NRF_TIMER_EVENT_COMPARE1 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[1]), ///< Event from compare channel 1.
283 NRF_TIMER_EVENT_COMPARE2 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[2]), ///< Event from compare channel 2.
284 NRF_TIMER_EVENT_COMPARE3 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[3]), ///< Event from compare channel 3.
285 #if NRF_TIMER_HAS_CC4
286 NRF_TIMER_EVENT_COMPARE4 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[4]), ///< Event from compare channel 4.
287 #endif
288 #if NRF_TIMER_HAS_CC5
289 NRF_TIMER_EVENT_COMPARE5 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[5]), ///< Event from compare channel 5.
290 #endif
291 #if NRF_TIMER_HAS_CC6
292 NRF_TIMER_EVENT_COMPARE6 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[6]), ///< Event from compare channel 6.
293 #endif
294 #if NRF_TIMER_HAS_CC7
295 NRF_TIMER_EVENT_COMPARE7 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[7]), ///< Event from compare channel 7.
296 #endif
297 } nrf_timer_event_t;
298
299 /** @brief Types of timer shortcuts. */
300 typedef enum
301 {
302 NRF_TIMER_SHORT_COMPARE0_STOP_MASK = TIMER_SHORTS_COMPARE0_STOP_Msk, ///< Shortcut for stopping the timer based on compare 0.
303 NRF_TIMER_SHORT_COMPARE1_STOP_MASK = TIMER_SHORTS_COMPARE1_STOP_Msk, ///< Shortcut for stopping the timer based on compare 1.
304 NRF_TIMER_SHORT_COMPARE2_STOP_MASK = TIMER_SHORTS_COMPARE2_STOP_Msk, ///< Shortcut for stopping the timer based on compare 2.
305 NRF_TIMER_SHORT_COMPARE3_STOP_MASK = TIMER_SHORTS_COMPARE3_STOP_Msk, ///< Shortcut for stopping the timer based on compare 3.
306 #if NRF_TIMER_HAS_CC4
307 NRF_TIMER_SHORT_COMPARE4_STOP_MASK = TIMER_SHORTS_COMPARE4_STOP_Msk, ///< Shortcut for stopping the timer based on compare 4.
308 #endif
309 #if NRF_TIMER_HAS_CC5
310 NRF_TIMER_SHORT_COMPARE5_STOP_MASK = TIMER_SHORTS_COMPARE5_STOP_Msk, ///< Shortcut for stopping the timer based on compare 5.
311 #endif
312 #if NRF_TIMER_HAS_CC6
313 NRF_TIMER_SHORT_COMPARE6_STOP_MASK = TIMER_SHORTS_COMPARE6_STOP_Msk, ///< Shortcut for stopping the timer based on compare 6.
314 #endif
315 #if NRF_TIMER_HAS_CC7
316 NRF_TIMER_SHORT_COMPARE7_STOP_MASK = TIMER_SHORTS_COMPARE7_STOP_Msk, ///< Shortcut for stopping the timer based on compare 7.
317 #endif
318 NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK = TIMER_SHORTS_COMPARE0_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 0.
319 NRF_TIMER_SHORT_COMPARE1_CLEAR_MASK = TIMER_SHORTS_COMPARE1_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 1.
320 NRF_TIMER_SHORT_COMPARE2_CLEAR_MASK = TIMER_SHORTS_COMPARE2_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 2.
321 NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK = TIMER_SHORTS_COMPARE3_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 3.
322 #if NRF_TIMER_HAS_CC4
323 NRF_TIMER_SHORT_COMPARE4_CLEAR_MASK = TIMER_SHORTS_COMPARE4_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 4.
324 #endif
325 #if NRF_TIMER_HAS_CC5
326 NRF_TIMER_SHORT_COMPARE5_CLEAR_MASK = TIMER_SHORTS_COMPARE5_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 5.
327 #endif
328 #if NRF_TIMER_HAS_CC6
329 NRF_TIMER_SHORT_COMPARE6_CLEAR_MASK = TIMER_SHORTS_COMPARE6_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 6.
330 #endif
331 #if NRF_TIMER_HAS_CC7
332 NRF_TIMER_SHORT_COMPARE7_CLEAR_MASK = TIMER_SHORTS_COMPARE7_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 7.
333 #endif
334 } nrf_timer_short_mask_t;
335
336 /** @brief Timer modes. */
337 typedef enum
338 {
339 NRF_TIMER_MODE_TIMER = TIMER_MODE_MODE_Timer, ///< Timer mode: timer.
340 NRF_TIMER_MODE_COUNTER = TIMER_MODE_MODE_Counter, ///< Timer mode: counter.
341 #if NRF_TIMER_HAS_LOW_POWER_MODE
342 NRF_TIMER_MODE_LOW_POWER_COUNTER = TIMER_MODE_MODE_LowPowerCounter, ///< Timer mode: low-power counter.
343 #endif
344 } nrf_timer_mode_t;
345
346 /** @brief Timer bit width. */
347 typedef enum
348 {
349 NRF_TIMER_BIT_WIDTH_8 = TIMER_BITMODE_BITMODE_08Bit, ///< Timer bit width 8 bit.
350 NRF_TIMER_BIT_WIDTH_16 = TIMER_BITMODE_BITMODE_16Bit, ///< Timer bit width 16 bit.
351 NRF_TIMER_BIT_WIDTH_24 = TIMER_BITMODE_BITMODE_24Bit, ///< Timer bit width 24 bit.
352 NRF_TIMER_BIT_WIDTH_32 = TIMER_BITMODE_BITMODE_32Bit ///< Timer bit width 32 bit.
353 } nrf_timer_bit_width_t;
354
355 /** @brief Timer prescalers. */
356 typedef enum
357 {
358 NRF_TIMER_FREQ_16MHz = 0, ///< Timer frequency 16 MHz.
359 NRF_TIMER_FREQ_8MHz, ///< Timer frequency 8 MHz.
360 NRF_TIMER_FREQ_4MHz, ///< Timer frequency 4 MHz.
361 NRF_TIMER_FREQ_2MHz, ///< Timer frequency 2 MHz.
362 NRF_TIMER_FREQ_1MHz, ///< Timer frequency 1 MHz.
363 NRF_TIMER_FREQ_500kHz, ///< Timer frequency 500 kHz.
364 NRF_TIMER_FREQ_250kHz, ///< Timer frequency 250 kHz.
365 NRF_TIMER_FREQ_125kHz, ///< Timer frequency 125 kHz.
366 NRF_TIMER_FREQ_62500Hz, ///< Timer frequency 62500 Hz.
367 NRF_TIMER_FREQ_31250Hz ///< Timer frequency 31250 Hz.
368 } nrf_timer_frequency_t;
369
370 /** @brief Timer capture/compare channels. */
371 typedef enum
372 {
373 NRF_TIMER_CC_CHANNEL0 = 0, ///< Timer capture/compare channel 0.
374 NRF_TIMER_CC_CHANNEL1, ///< Timer capture/compare channel 1.
375 NRF_TIMER_CC_CHANNEL2, ///< Timer capture/compare channel 2.
376 NRF_TIMER_CC_CHANNEL3, ///< Timer capture/compare channel 3.
377 #if NRF_TIMER_HAS_CC4
378 NRF_TIMER_CC_CHANNEL4, ///< Timer capture/compare channel 4.
379 #endif
380 #if NRF_TIMER_HAS_CC5
381 NRF_TIMER_CC_CHANNEL5, ///< Timer capture/compare channel 5.
382 #endif
383 #if NRF_TIMER_HAS_CC6
384 NRF_TIMER_CC_CHANNEL6, ///< Timer capture/compare channel 6.
385 #endif
386 #if NRF_TIMER_HAS_CC7
387 NRF_TIMER_CC_CHANNEL7, ///< Timer capture/compare channel 7.
388 #endif
389 } nrf_timer_cc_channel_t;
390
391 /** @brief Timer interrupts. */
392 typedef enum
393 {
394 NRF_TIMER_INT_COMPARE0_MASK = TIMER_INTENSET_COMPARE0_Msk, ///< Timer interrupt from compare event on channel 0.
395 NRF_TIMER_INT_COMPARE1_MASK = TIMER_INTENSET_COMPARE1_Msk, ///< Timer interrupt from compare event on channel 1.
396 NRF_TIMER_INT_COMPARE2_MASK = TIMER_INTENSET_COMPARE2_Msk, ///< Timer interrupt from compare event on channel 2.
397 NRF_TIMER_INT_COMPARE3_MASK = TIMER_INTENSET_COMPARE3_Msk, ///< Timer interrupt from compare event on channel 3.
398 #if NRF_TIMER_HAS_CC4
399 NRF_TIMER_INT_COMPARE4_MASK = TIMER_INTENSET_COMPARE4_Msk, ///< Timer interrupt from compare event on channel 4.
400 #endif
401 #if NRF_TIMER_HAS_CC5
402 NRF_TIMER_INT_COMPARE5_MASK = TIMER_INTENSET_COMPARE5_Msk, ///< Timer interrupt from compare event on channel 5.
403 #endif
404 #if NRF_TIMER_HAS_CC6
405 NRF_TIMER_INT_COMPARE6_MASK = TIMER_INTENSET_COMPARE6_Msk, ///< Timer interrupt from compare event on channel 6.
406 #endif
407 #if NRF_TIMER_HAS_CC7
408 NRF_TIMER_INT_COMPARE7_MASK = TIMER_INTENSET_COMPARE7_Msk, ///< Timer interrupt from compare event on channel 7.
409 #endif
410 } nrf_timer_int_mask_t;
411
412
413 /**
414 * @brief Function for setting the prescaler factor.
415 *
416 * @note Prescaler value is expressed as \f$ 2^{prescaler\_factor} \f$.
417 *
418 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
419 * @param[in] prescaler_factor Prescaler factor.
420 */
421 NRF_STATIC_INLINE void nrf_timer_prescaler_set(NRF_TIMER_Type * p_reg, uint32_t prescaler_factor);
422
423 /**
424 * @brief Function for retrieving the prescaler factor.
425 *
426 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
427 *
428 * @return Prescaler factor.
429 */
430 NRF_STATIC_INLINE uint32_t nrf_timer_prescaler_get(NRF_TIMER_Type const * p_reg);
431
432 /**
433 * @brief Function for activating the specified timer task.
434 *
435 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
436 * @param[in] task Task to be activated.
437 */
438 NRF_STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg,
439 nrf_timer_task_t task);
440
441 /**
442 * @brief Function for getting the address of the specified timer task register.
443 *
444 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
445 * @param[in] task The specified task.
446 *
447 * @return Address of the specified task register.
448 */
449 NRF_STATIC_INLINE uint32_t nrf_timer_task_address_get(NRF_TIMER_Type const * p_reg,
450 nrf_timer_task_t task);
451
452 /**
453 * @brief Function for clearing the specified timer event.
454 *
455 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
456 * @param[in] event Event to clear.
457 */
458 NRF_STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg,
459 nrf_timer_event_t event);
460
461 /**
462 * @brief Function for retrieving the state of the TIMER event.
463 *
464 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
465 * @param[in] event Event to be checked.
466 *
467 * @retval true The event has been generated.
468 * @retval false The event has not been generated.
469 */
470 NRF_STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type const * p_reg,
471 nrf_timer_event_t event);
472
473 /**
474 * @brief Function for getting the address of the specified timer event register.
475 *
476 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
477 * @param[in] event The specified event.
478 *
479 * @return Address of the specified event register.
480 */
481 NRF_STATIC_INLINE uint32_t nrf_timer_event_address_get(NRF_TIMER_Type const * p_reg,
482 nrf_timer_event_t event);
483
484 /**
485 * @brief Function for enabling the specified shortcuts.
486 *
487 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
488 * @param[in] mask Shortcuts to be enabled.
489 */
490 NRF_STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,
491 uint32_t mask);
492
493 /**
494 * @brief Function for disabling the specified shortcuts.
495 *
496 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
497 * @param[in] mask Shortcuts to be disabled.
498 */
499 NRF_STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,
500 uint32_t mask);
501
502 /**
503 * @brief Function for setting the specified shortcuts.
504 *
505 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
506 * @param[in] mask Shortcuts to be set.
507 */
508 NRF_STATIC_INLINE void nrf_timer_shorts_set(NRF_TIMER_Type * p_reg,
509 uint32_t mask);
510
511 /**
512 * @brief Function for getting COMPARE_CLEAR short mask for the specified channel.
513 *
514 * @param[in] channel Channel.
515 *
516 * @return Short mask.
517 */
518 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_clear_get(uint8_t channel);
519
520 /**
521 * @brief Function for getting COMPARE_STOP short mask for the specified channel.
522 *
523 * @param[in] channel Channel.
524 *
525 * @return Short mask.
526 */
527 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_stop_get(uint8_t channel);
528
529 /**
530 * @brief Function for enabling the specified interrupts.
531 *
532 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
533 * @param[in] mask Mask of interrupts to be enabled.
534 */
535 NRF_STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg,
536 uint32_t mask);
537
538 /**
539 * @brief Function for disabling the specified interrupts.
540 *
541 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
542 * @param[in] mask Mask of interrupts to be disabled.
543 */
544 NRF_STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg,
545 uint32_t mask);
546
547 /**
548 * @brief Function for checking if the specified interrupts are enabled.
549 *
550 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
551 * @param[in] mask Mask of interrupts to be checked.
552 *
553 * @return Mask of enabled interrupts.
554 */
555 NRF_STATIC_INLINE uint32_t nrf_timer_int_enable_check(NRF_TIMER_Type const * p_reg, uint32_t mask);
556
557 #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
558 /**
559 * @brief Function for setting the subscribe configuration for a given
560 * TIMER task.
561 *
562 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
563 * @param[in] task Task for which to set the configuration.
564 * @param[in] channel Channel through which to subscribe events.
565 */
566 NRF_STATIC_INLINE void nrf_timer_subscribe_set(NRF_TIMER_Type * p_reg,
567 nrf_timer_task_t task,
568 uint8_t channel);
569
570 /**
571 * @brief Function for clearing the subscribe configuration for a given
572 * TIMER task.
573 *
574 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
575 * @param[in] task Task for which to clear the configuration.
576 */
577 NRF_STATIC_INLINE void nrf_timer_subscribe_clear(NRF_TIMER_Type * p_reg,
578 nrf_timer_task_t task);
579
580 /**
581 * @brief Function for setting the publish configuration for a given
582 * TIMER event.
583 *
584 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
585 * @param[in] event Event for which to set the configuration.
586 * @param[in] channel Channel through which to publish the event.
587 */
588 NRF_STATIC_INLINE void nrf_timer_publish_set(NRF_TIMER_Type * p_reg,
589 nrf_timer_event_t event,
590 uint8_t channel);
591
592 /**
593 * @brief Function for clearing the publish configuration for a given
594 * TIMER event.
595 *
596 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
597 * @param[in] event Event for which to clear the configuration.
598 */
599 NRF_STATIC_INLINE void nrf_timer_publish_clear(NRF_TIMER_Type * p_reg,
600 nrf_timer_event_t event);
601 #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
602
603 /**
604 * @brief Function for setting the timer mode.
605 *
606 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
607 * @param[in] mode Timer mode.
608 */
609 NRF_STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg,
610 nrf_timer_mode_t mode);
611
612 /**
613 * @brief Function for retrieving the timer mode.
614 *
615 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
616 *
617 * @return Timer mode.
618 */
619 NRF_STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type const * p_reg);
620
621 /**
622 * @brief Function for setting the timer bit width.
623 *
624 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
625 * @param[in] bit_width Timer bit width.
626 */
627 NRF_STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,
628 nrf_timer_bit_width_t bit_width);
629
630 /**
631 * @brief Function for retrieving the timer bit width.
632 *
633 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
634 *
635 * @return Timer bit width.
636 */
637 NRF_STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type const * p_reg);
638
639 /**
640 * @brief Function for setting the capture/compare register for the specified channel.
641 *
642 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
643 * @param[in] cc_channel The specified capture/compare channel.
644 * @param[in] cc_value Value to write to the capture/compare register.
645 */
646 NRF_STATIC_INLINE void nrf_timer_cc_set(NRF_TIMER_Type * p_reg,
647 nrf_timer_cc_channel_t cc_channel,
648 uint32_t cc_value);
649
650 /**
651 * @brief Function for retrieving the capture/compare value for a specified channel.
652 *
653 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
654 * @param[in] cc_channel The specified capture/compare channel.
655 *
656 * @return Value from the specified capture/compare register.
657 */
658 NRF_STATIC_INLINE uint32_t nrf_timer_cc_get(NRF_TIMER_Type const * p_reg,
659 nrf_timer_cc_channel_t cc_channel);
660
661 /**
662 * @brief Function for getting the specified timer capture task.
663 *
664 * @param[in] channel Capture channel.
665 *
666 * @return Capture task.
667 */
668 NRF_STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint8_t channel);
669
670 /**
671 * @brief Function for getting the specified timer compare event.
672 *
673 * @param[in] channel Compare channel.
674 *
675 * @return Compare event.
676 */
677 NRF_STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint8_t channel);
678
679 /**
680 * @brief Function for getting the specified timer compare interrupt.
681 *
682 * @param[in] channel Compare channel.
683 *
684 * @return Compare interrupt.
685 */
686 NRF_STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint8_t channel);
687
688 /**
689 * @brief Function for calculating the number of timer ticks for a given time
690 * (in microseconds) and timer frequency.
691 *
692 * @param[in] time_us Time in microseconds.
693 * @param[in] frequency Timer frequency.
694 *
695 * @return Number of timer ticks.
696 */
697 NRF_STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us,
698 nrf_timer_frequency_t frequency);
699
700 /**
701 * @brief Function for calculating the number of timer ticks for a given time
702 * (in milliseconds) and timer frequency.
703 *
704 * @param[in] time_ms Time in milliseconds.
705 * @param[in] frequency Timer frequency.
706 *
707 * @return Number of timer ticks.
708 */
709 NRF_STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms,
710 nrf_timer_frequency_t frequency);
711
712 #if NRF_TIMER_HAS_ONE_SHOT
713 /**
714 * @brief Function for enabling one-shot operation for the specified capture/compare channel.
715 *
716 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
717 * @param[in] cc_channel Capture/compare channel.
718 */
719 NRF_STATIC_INLINE void nrf_timer_one_shot_enable(NRF_TIMER_Type * p_reg,
720 nrf_timer_cc_channel_t cc_channel);
721
722 /**
723 * @brief Function for disabling one-shot operation for the specified capture/compare channel.
724 *
725 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
726 * @param[in] cc_channel Capture/compare channel.
727 */
728 NRF_STATIC_INLINE void nrf_timer_one_shot_disable(NRF_TIMER_Type * p_reg,
729 nrf_timer_cc_channel_t cc_channel);
730
731 #endif // NRF_TIMER_HAS_ONE_SHOT
732
733 #ifndef NRF_DECLARE_ONLY
734
nrf_timer_task_trigger(NRF_TIMER_Type * p_reg,nrf_timer_task_t task)735 NRF_STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg,
736 nrf_timer_task_t task)
737 {
738 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
739 }
740
nrf_timer_task_address_get(NRF_TIMER_Type const * p_reg,nrf_timer_task_t task)741 NRF_STATIC_INLINE uint32_t nrf_timer_task_address_get(NRF_TIMER_Type const * p_reg,
742 nrf_timer_task_t task)
743 {
744 return (uint32_t)((uint8_t *)p_reg + (uint32_t)task);
745 }
746
nrf_timer_event_clear(NRF_TIMER_Type * p_reg,nrf_timer_event_t event)747 NRF_STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg,
748 nrf_timer_event_t event)
749 {
750 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
751 nrf_event_readback((uint8_t *)p_reg + (uint32_t)event);
752 }
753
nrf_timer_event_check(NRF_TIMER_Type const * p_reg,nrf_timer_event_t event)754 NRF_STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type const * p_reg,
755 nrf_timer_event_t event)
756 {
757 return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
758 }
759
nrf_timer_event_address_get(NRF_TIMER_Type const * p_reg,nrf_timer_event_t event)760 NRF_STATIC_INLINE uint32_t nrf_timer_event_address_get(NRF_TIMER_Type const * p_reg,
761 nrf_timer_event_t event)
762 {
763 return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
764 }
765
nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,uint32_t mask)766 NRF_STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,
767 uint32_t mask)
768 {
769 p_reg->SHORTS |= mask;
770 }
771
nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,uint32_t mask)772 NRF_STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,
773 uint32_t mask)
774 {
775 p_reg->SHORTS &= ~(mask);
776 }
777
nrf_timer_shorts_set(NRF_TIMER_Type * p_reg,uint32_t mask)778 NRF_STATIC_INLINE void nrf_timer_shorts_set(NRF_TIMER_Type * p_reg,
779 uint32_t mask)
780 {
781 p_reg->SHORTS = mask;
782 }
783
nrf_timer_short_compare_clear_get(uint8_t channel)784 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_clear_get(uint8_t channel)
785 {
786 return (nrf_timer_short_mask_t)((uint32_t)NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK << channel);
787 }
788
nrf_timer_short_compare_stop_get(uint8_t channel)789 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_stop_get(uint8_t channel)
790 {
791 return (nrf_timer_short_mask_t)((uint32_t)NRF_TIMER_SHORT_COMPARE0_STOP_MASK << channel);
792 }
793
nrf_timer_int_enable(NRF_TIMER_Type * p_reg,uint32_t mask)794 NRF_STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg,
795 uint32_t mask)
796 {
797 p_reg->INTENSET = mask;
798 }
799
nrf_timer_int_disable(NRF_TIMER_Type * p_reg,uint32_t mask)800 NRF_STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg,
801 uint32_t mask)
802 {
803 p_reg->INTENCLR = mask;
804 }
805
nrf_timer_int_enable_check(NRF_TIMER_Type const * p_reg,uint32_t mask)806 NRF_STATIC_INLINE uint32_t nrf_timer_int_enable_check(NRF_TIMER_Type const * p_reg, uint32_t mask)
807 {
808 return p_reg->INTENSET & mask;
809 }
810
811 #if defined(DPPI_PRESENT)
nrf_timer_subscribe_set(NRF_TIMER_Type * p_reg,nrf_timer_task_t task,uint8_t channel)812 NRF_STATIC_INLINE void nrf_timer_subscribe_set(NRF_TIMER_Type * p_reg,
813 nrf_timer_task_t task,
814 uint8_t channel)
815 {
816 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
817 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
818 }
819
nrf_timer_subscribe_clear(NRF_TIMER_Type * p_reg,nrf_timer_task_t task)820 NRF_STATIC_INLINE void nrf_timer_subscribe_clear(NRF_TIMER_Type * p_reg,
821 nrf_timer_task_t task)
822 {
823 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0;
824 }
825
nrf_timer_publish_set(NRF_TIMER_Type * p_reg,nrf_timer_event_t event,uint8_t channel)826 NRF_STATIC_INLINE void nrf_timer_publish_set(NRF_TIMER_Type * p_reg,
827 nrf_timer_event_t event,
828 uint8_t channel)
829 {
830 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
831 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
832 }
833
nrf_timer_publish_clear(NRF_TIMER_Type * p_reg,nrf_timer_event_t event)834 NRF_STATIC_INLINE void nrf_timer_publish_clear(NRF_TIMER_Type * p_reg,
835 nrf_timer_event_t event)
836 {
837 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0;
838 }
839 #endif // defined(DPPI_PRESENT)
840
nrf_timer_mode_set(NRF_TIMER_Type * p_reg,nrf_timer_mode_t mode)841 NRF_STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg,
842 nrf_timer_mode_t mode)
843 {
844 p_reg->MODE = (p_reg->MODE & ~TIMER_MODE_MODE_Msk) |
845 ((mode << TIMER_MODE_MODE_Pos) & TIMER_MODE_MODE_Msk);
846 }
847
nrf_timer_mode_get(NRF_TIMER_Type const * p_reg)848 NRF_STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type const * p_reg)
849 {
850 return (nrf_timer_mode_t)(p_reg->MODE);
851 }
852
nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,nrf_timer_bit_width_t bit_width)853 NRF_STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,
854 nrf_timer_bit_width_t bit_width)
855 {
856 p_reg->BITMODE = (p_reg->BITMODE & ~TIMER_BITMODE_BITMODE_Msk) |
857 ((bit_width << TIMER_BITMODE_BITMODE_Pos) &
858 TIMER_BITMODE_BITMODE_Msk);
859 }
860
nrf_timer_bit_width_get(NRF_TIMER_Type const * p_reg)861 NRF_STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type const * p_reg)
862 {
863 return (nrf_timer_bit_width_t)(p_reg->BITMODE);
864 }
865
nrf_timer_prescaler_set(NRF_TIMER_Type * p_reg,uint32_t prescaler_factor)866 NRF_STATIC_INLINE void nrf_timer_prescaler_set(NRF_TIMER_Type * p_reg, uint32_t prescaler_factor)
867 {
868 NRFX_ASSERT(prescaler_factor <= NRF_TIMER_PRESCALER_MAX);
869 p_reg->PRESCALER = prescaler_factor;
870 }
871
nrf_timer_prescaler_get(NRF_TIMER_Type const * p_reg)872 NRF_STATIC_INLINE uint32_t nrf_timer_prescaler_get(NRF_TIMER_Type const * p_reg)
873 {
874 return p_reg->PRESCALER;
875 }
876
nrf_timer_cc_set(NRF_TIMER_Type * p_reg,nrf_timer_cc_channel_t cc_channel,uint32_t cc_value)877 NRF_STATIC_INLINE void nrf_timer_cc_set(NRF_TIMER_Type * p_reg,
878 nrf_timer_cc_channel_t cc_channel,
879 uint32_t cc_value)
880 {
881 p_reg->CC[cc_channel] = cc_value;
882 }
883
nrf_timer_cc_get(NRF_TIMER_Type const * p_reg,nrf_timer_cc_channel_t cc_channel)884 NRF_STATIC_INLINE uint32_t nrf_timer_cc_get(NRF_TIMER_Type const * p_reg,
885 nrf_timer_cc_channel_t cc_channel)
886 {
887 return (uint32_t)p_reg->CC[cc_channel];
888 }
889
nrf_timer_capture_task_get(uint8_t channel)890 NRF_STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint8_t channel)
891 {
892 return (nrf_timer_task_t)NRFX_OFFSETOF(NRF_TIMER_Type, TASKS_CAPTURE[channel]);
893 }
894
nrf_timer_compare_event_get(uint8_t channel)895 NRF_STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint8_t channel)
896 {
897 return (nrf_timer_event_t)NRFX_OFFSETOF(NRF_TIMER_Type, EVENTS_COMPARE[channel]);
898 }
899
nrf_timer_compare_int_get(uint8_t channel)900 NRF_STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint8_t channel)
901 {
902 return (nrf_timer_int_mask_t)
903 ((uint32_t)NRF_TIMER_INT_COMPARE0_MASK << channel);
904 }
905
nrf_timer_us_to_ticks(uint32_t time_us,nrf_timer_frequency_t frequency)906 NRF_STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us,
907 nrf_timer_frequency_t frequency)
908 {
909 // The "frequency" parameter here is actually the prescaler value, and the
910 // timer runs at the following frequency: f = 16 MHz / 2^prescaler.
911 uint32_t prescaler = (uint32_t)frequency;
912 uint64_t ticks = ((time_us * 16ULL) >> prescaler);
913 NRFX_ASSERT(ticks <= UINT32_MAX);
914 return (uint32_t)ticks;
915 }
916
nrf_timer_ms_to_ticks(uint32_t time_ms,nrf_timer_frequency_t frequency)917 NRF_STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms,
918 nrf_timer_frequency_t frequency)
919 {
920 // The "frequency" parameter here is actually the prescaler value, and the
921 // timer runs at the following frequency: f = 16000 kHz / 2^prescaler.
922 uint32_t prescaler = (uint32_t)frequency;
923 uint64_t ticks = ((time_ms * 16000ULL) >> prescaler);
924 NRFX_ASSERT(ticks <= UINT32_MAX);
925 return (uint32_t)ticks;
926 }
927
928 #if NRF_TIMER_HAS_ONE_SHOT
nrf_timer_one_shot_enable(NRF_TIMER_Type * p_reg,nrf_timer_cc_channel_t cc_channel)929 NRF_STATIC_INLINE void nrf_timer_one_shot_enable(NRF_TIMER_Type * p_reg,
930 nrf_timer_cc_channel_t cc_channel)
931 {
932 p_reg->ONESHOTEN[cc_channel] = TIMER_ONESHOTEN_ONESHOTEN_Msk;
933 }
934
nrf_timer_one_shot_disable(NRF_TIMER_Type * p_reg,nrf_timer_cc_channel_t cc_channel)935 NRF_STATIC_INLINE void nrf_timer_one_shot_disable(NRF_TIMER_Type * p_reg,
936 nrf_timer_cc_channel_t cc_channel)
937 {
938 p_reg->ONESHOTEN[cc_channel] = 0;
939 }
940 #endif // NRF_TIMER_HAS_ONE_SHOT
941
942 #endif // NRF_DECLARE_ONLY
943
944 /** @} */
945
946 #ifdef __cplusplus
947 }
948 #endif
949
950 #endif // NRF_TIMER_H__
951
