1 /*
2 * Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice, this
11 * list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived from this
19 * software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef NRF_SAADC_H_
35 #define NRF_SAADC_H_
36
37 #include <nrfx.h>
38
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42
43 /**
44 * @defgroup nrf_saadc_hal SAADC HAL
45 * @{
46 * @ingroup nrf_saadc
47 * @brief Hardware access layer for managing the SAADC peripheral.
48 */
49
50 /** @brief Symbol specifying the offset of interrupt bitmask for limits of all channels. */
51 #define NRF_SAADC_LIMITS_INT_OFFSET \
52 NRFX_MIN(SAADC_INTENSET_CH0LIMITH_Pos, SAADC_INTENSET_CH0LIMITL_Pos)
53
54 /** @brief Symbol specifying the interrupt bitmask for limits of all channels. */
55 #define NRF_SAADC_ALL_CHANNELS_LIMITS_INT_MASK \
56 ((uint32_t)(((1 << SAADC_CH_NUM) - 1) << NRF_SAADC_LIMITS_INT_OFFSET))
57
58 #if defined(SAADC_CH_CONFIG_TACQ_3us) || defined(__NRFX_DOXYGEN__)
59 /** @brief Symbol indicating whether the configuration of acquisition time using predefined values is present. */
60 #define NRF_SAADC_HAS_ACQTIME_ENUM 1
61 #else
62 #define NRF_SAADC_HAS_ACQTIME_ENUM 0
63 #endif
64
65 #if defined(SAADC_CH_CONFIG_TCONV_Msk) || defined(__NRFX_DOXYGEN__)
66 /** @brief Symbol indicating whether the configuration of conversion time is present. */
67 #define NRF_SAADC_HAS_CONVTIME 1
68 #else
69 #define NRF_SAADC_HAS_CONVTIME 0
70 #endif
71
72 #if defined(SAADC_TRIM_LINCALCOEFF_VAL_Msk) || defined(__NRFX_DOXYGEN__)
73 /** @brief Symbol indicating whether the configuration of linearity calibration coefficients is present. */
74 #define NRF_SAADC_HAS_LIN_CAL 1
75 #else
76 #define NRF_SAADC_HAS_LIN_CAL 0
77 #endif
78
79 #if defined(SAADC_CH_PSELP_PIN_Msk) || defined(__NRFX_DOXYGEN__)
80 /** @brief Symbol indicating whether configuration of analog input using pin number is present. */
81 #define NRF_SAADC_HAS_AIN_AS_PIN 1
82 #else
83 #define NRF_SAADC_HAS_AIN_AS_PIN 0
84 #endif
85
86 #if defined(SAADC_DMA_PTR_PTR_Msk) || defined(__NRFX_DOXYGEN__)
87 /** @brief Symbol indicating whether dedicated DMA register is present. */
88 #define NRF_SAADC_HAS_DMA_REG 1
89 #else
90 #define NRF_SAADC_HAS_DMA_REG 0
91 #endif
92
93 #if (defined(SAADC_TASKS_DMA_START_START_Msk) && defined(SAADC_EVENTS_DMA_END_END_Msk)) || \
94 defined(__NRFX_DOXYGEN__)
95 /** @brief Symbol indicating whether SAADC DMA tasks and events are present. */
96 #define NRF_SAADC_HAS_DMA_TASKS_EVENTS 1
97 #else
98 #define NRF_SAADC_HAS_DMA_TASKS_EVENTS 0
99 #endif
100
101 #if !NRF_SAADC_HAS_ACQTIME_ENUM
102 /** @brief Maximum value of acquire time. */
103 #define NRF_SAADC_ACQTIME_MAX SAADC_CH_CONFIG_TACQ_Max
104 #endif
105
106 #if NRF_SAADC_HAS_CONVTIME
107 /** @brief Symbol specifying maximum value of conversion time. */
108 #define NRF_SAADC_CONVTIME_MAX SAADC_CH_CONFIG_TCONV_Max
109 #endif
110
111 #if NRF_SAADC_HAS_LIN_CAL
112 /** @brief Symbol specifying maximum count of linearity calibration coefficients. */
113 #define NRF_SAADC_LIN_CAL_MAX_COUNT SAADC_TRIM_LINCALCOEFF_MaxCount
114
115 /** @brief Symbol specifying maximum value of linearity calibration coefficient. */
116 #define NRF_SAADC_LIN_CAL_MAX SAADC_TRIM_LINCALCOEFF_VAL_Max
117 #endif
118
119 /** @brief Resolution of the analog-to-digital converter. */
120 typedef enum
121 {
122 NRF_SAADC_RESOLUTION_8BIT = SAADC_RESOLUTION_VAL_8bit, ///< 8 bit resolution.
123 NRF_SAADC_RESOLUTION_10BIT = SAADC_RESOLUTION_VAL_10bit, ///< 10 bit resolution.
124 NRF_SAADC_RESOLUTION_12BIT = SAADC_RESOLUTION_VAL_12bit, ///< 12 bit resolution.
125 NRF_SAADC_RESOLUTION_14BIT = SAADC_RESOLUTION_VAL_14bit ///< 14 bit resolution.
126 } nrf_saadc_resolution_t;
127
128 #if NRF_SAADC_HAS_AIN_AS_PIN
129 /** @brief Analog input type. */
130 typedef uint32_t nrf_saadc_input_t;
131
132 /** @brief Symbol specifying disconnected analog input. */
133 #define NRF_SAADC_INPUT_DISABLED ((nrf_saadc_input_t)0)
134 #else
135 /** @brief Input selection for the analog-to-digital converter. */
136 typedef enum
137 {
138 NRF_SAADC_INPUT_DISABLED = SAADC_CH_PSELP_PSELP_NC, ///< Not connected.
139 NRF_SAADC_INPUT_AIN0 = SAADC_CH_PSELP_PSELP_AnalogInput0, ///< Analog input 0 (AIN0).
140 NRF_SAADC_INPUT_AIN1 = SAADC_CH_PSELP_PSELP_AnalogInput1, ///< Analog input 1 (AIN1).
141 NRF_SAADC_INPUT_AIN2 = SAADC_CH_PSELP_PSELP_AnalogInput2, ///< Analog input 2 (AIN2).
142 NRF_SAADC_INPUT_AIN3 = SAADC_CH_PSELP_PSELP_AnalogInput3, ///< Analog input 3 (AIN3).
143 NRF_SAADC_INPUT_AIN4 = SAADC_CH_PSELP_PSELP_AnalogInput4, ///< Analog input 4 (AIN4).
144 NRF_SAADC_INPUT_AIN5 = SAADC_CH_PSELP_PSELP_AnalogInput5, ///< Analog input 5 (AIN5).
145 NRF_SAADC_INPUT_AIN6 = SAADC_CH_PSELP_PSELP_AnalogInput6, ///< Analog input 6 (AIN6).
146 NRF_SAADC_INPUT_AIN7 = SAADC_CH_PSELP_PSELP_AnalogInput7, ///< Analog input 7 (AIN7).
147 #if defined(SAADC_CH_PSELP_PSELP_VDD) || defined(__NRFX_DOXYGEN__)
148 NRF_SAADC_INPUT_VDD = SAADC_CH_PSELP_PSELP_VDD, ///< VDD as input.
149 #endif
150 #if defined(SAADC_CH_PSELP_PSELP_VDDHDIV5) || defined(__NRFX_DOXYGEN__)
151 NRF_SAADC_INPUT_VDDHDIV5 = SAADC_CH_PSELP_PSELP_VDDHDIV5 ///< VDDH/5 as input.
152 #endif
153 #if defined(SAADC_CH_PSELP_PSELP_AnalogInput8) || defined(__NRFX_DOXYGEN__)
154 NRF_SAADC_INPUT_AIN8 = SAADC_CH_PSELP_PSELP_AnalogInput8, ///< Analog input 8 (AIN8).
155 #endif
156 #if defined(SAADC_CH_PSELP_PSELP_AnalogInput9) || defined(__NRFX_DOXYGEN__)
157 NRF_SAADC_INPUT_AIN9 = SAADC_CH_PSELP_PSELP_AnalogInput9, ///< Analog input 9 (AIN9).
158 #endif
159 #if defined(SAADC_CH_PSELP_PSELP_AnalogInput10) || defined(__NRFX_DOXYGEN__)
160 NRF_SAADC_INPUT_AIN10 = SAADC_CH_PSELP_PSELP_AnalogInput10, ///< Analog input 10 (AIN10).
161 #endif
162 #if defined(SAADC_CH_PSELP_PSELP_AnalogInput11) || defined(__NRFX_DOXYGEN__)
163 NRF_SAADC_INPUT_AIN11 = SAADC_CH_PSELP_PSELP_AnalogInput11, ///< Analog input 11 (AIN11).
164 #endif
165 #if defined(SAADC_CH_PSELP_PSELP_AnalogInput12) || defined(__NRFX_DOXYGEN__)
166 NRF_SAADC_INPUT_AIN12 = SAADC_CH_PSELP_PSELP_AnalogInput12, ///< Analog input 12 (AIN12).
167 #endif
168 #if defined(SAADC_CH_PSELP_PSELP_AnalogInput13) || defined(__NRFX_DOXYGEN__)
169 NRF_SAADC_INPUT_AIN13 = SAADC_CH_PSELP_PSELP_AnalogInput13, ///< Analog input 13 (AIN13).
170 #endif
171 } nrf_saadc_input_t;
172 #endif
173
174 /** @brief Analog-to-digital converter oversampling mode. */
175 typedef enum
176 {
177 NRF_SAADC_OVERSAMPLE_DISABLED = SAADC_OVERSAMPLE_OVERSAMPLE_Bypass, ///< No oversampling.
178 NRF_SAADC_OVERSAMPLE_2X = SAADC_OVERSAMPLE_OVERSAMPLE_Over2x, ///< Oversample 2x.
179 NRF_SAADC_OVERSAMPLE_4X = SAADC_OVERSAMPLE_OVERSAMPLE_Over4x, ///< Oversample 4x.
180 NRF_SAADC_OVERSAMPLE_8X = SAADC_OVERSAMPLE_OVERSAMPLE_Over8x, ///< Oversample 8x.
181 NRF_SAADC_OVERSAMPLE_16X = SAADC_OVERSAMPLE_OVERSAMPLE_Over16x, ///< Oversample 16x.
182 NRF_SAADC_OVERSAMPLE_32X = SAADC_OVERSAMPLE_OVERSAMPLE_Over32x, ///< Oversample 32x.
183 NRF_SAADC_OVERSAMPLE_64X = SAADC_OVERSAMPLE_OVERSAMPLE_Over64x, ///< Oversample 64x.
184 NRF_SAADC_OVERSAMPLE_128X = SAADC_OVERSAMPLE_OVERSAMPLE_Over128x, ///< Oversample 128x.
185 NRF_SAADC_OVERSAMPLE_256X = SAADC_OVERSAMPLE_OVERSAMPLE_Over256x ///< Oversample 256x.
186 } nrf_saadc_oversample_t;
187
188 /** @brief Analog-to-digital converter channel resistor control. */
189 typedef enum
190 {
191 NRF_SAADC_RESISTOR_DISABLED = SAADC_CH_CONFIG_RESP_Bypass, ///< Bypass resistor ladder.
192 NRF_SAADC_RESISTOR_PULLDOWN = SAADC_CH_CONFIG_RESP_Pulldown, ///< Pull-down to GND.
193 NRF_SAADC_RESISTOR_PULLUP = SAADC_CH_CONFIG_RESP_Pullup, ///< Pull-up to VDD.
194 #if defined(SAADC_CH_CONFIG_RESP_VDD1_2) || defined(__NRFX_DOXYGEN__)
195 NRF_SAADC_RESISTOR_VDD1_2 = SAADC_CH_CONFIG_RESP_VDD1_2, ///< Set input at VDD/2.
196 #endif
197 #if defined(SAADC_CH_CONFIG_RESP_VDDAO1V8div2)
198 NRF_SAADC_RESISTOR_VDD1_2 = SAADC_CH_CONFIG_RESP_VDDAO1V8div2, ///< Set input at VDD/2.
199 #endif
200 } nrf_saadc_resistor_t;
201
202 /** @brief Gain factor of the analog-to-digital converter input. */
203 typedef enum
204 {
205 #if defined(SAADC_CH_CONFIG_GAIN_Gain1_6) || defined(__NRFX_DOXYGEN__)
206 NRF_SAADC_GAIN1_6 = SAADC_CH_CONFIG_GAIN_Gain1_6, ///< Gain factor 1/6.
207 #endif
208 #if defined(SAADC_CH_CONFIG_GAIN_Gain1_5) || defined(__NRFX_DOXYGEN__)
209 NRF_SAADC_GAIN1_5 = SAADC_CH_CONFIG_GAIN_Gain1_5, ///< Gain factor 1/5.
210 #endif
211 #if defined(SAADC_CH_CONFIG_GAIN_Gain1_4) || defined(__NRFX_DOXYGEN__)
212 NRF_SAADC_GAIN1_4 = SAADC_CH_CONFIG_GAIN_Gain1_4, ///< Gain factor 1/4.
213 #endif
214 #if defined(SAADC_CH_CONFIG_GAIN_Gain1_3) || defined(__NRFX_DOXYGEN__)
215 NRF_SAADC_GAIN1_3 = SAADC_CH_CONFIG_GAIN_Gain1_3, ///< Gain factor 1/3.
216 #endif
217 #if defined(SAADC_CH_CONFIG_GAIN_Gain1_2) || defined(__NRFX_DOXYGEN__)
218 NRF_SAADC_GAIN1_2 = SAADC_CH_CONFIG_GAIN_Gain1_2, ///< Gain factor 1/2.
219 #endif
220 #if defined(SAADC_CH_CONFIG_GAIN_Gain2_3) || defined(__NRFX_DOXYGEN__)
221 NRF_SAADC_GAIN2_3 = SAADC_CH_CONFIG_GAIN_Gain2_3, ///< Gain factor 2/3.
222 #endif
223 NRF_SAADC_GAIN1 = SAADC_CH_CONFIG_GAIN_Gain1, ///< Gain factor 1.
224 NRF_SAADC_GAIN2 = SAADC_CH_CONFIG_GAIN_Gain2, ///< Gain factor 2.
225 NRF_SAADC_GAIN4 = SAADC_CH_CONFIG_GAIN_Gain4, ///< Gain factor 4.
226 } nrf_saadc_gain_t;
227
228 /** @brief Reference selection for the analog-to-digital converter. */
229 typedef enum
230 {
231 #if defined(SAADC_CH_CONFIG_REFSEL_Internal) || defined(__NRFX_DOXYGEN__)
232 NRF_SAADC_REFERENCE_INTERNAL = SAADC_CH_CONFIG_REFSEL_Internal, ///< Internal reference.
233 #endif
234 #if defined(SAADC_CH_CONFIG_REFSEL_VDD1_4) || defined(__NRFX_DOXYGEN__)
235 NRF_SAADC_REFERENCE_VDD4 = SAADC_CH_CONFIG_REFSEL_VDD1_4 ///< VDD/4 as reference.
236 #endif
237 #if defined(SAADC_CH_CONFIG_REFSEL_External) || defined(__NRFX_DOXYGEN__)
238 NRF_SAADC_REFERENCE_EXTERNAL = SAADC_CH_CONFIG_REFSEL_External, ///< External reference.
239 #endif
240 } nrf_saadc_reference_t;
241
242 #if NRF_SAADC_HAS_ACQTIME_ENUM
243 /** @brief Analog-to-digital converter acquisition time. */
244 typedef enum
245 {
246 NRF_SAADC_ACQTIME_3US = SAADC_CH_CONFIG_TACQ_3us, ///< 3 us.
247 NRF_SAADC_ACQTIME_5US = SAADC_CH_CONFIG_TACQ_5us, ///< 5 us.
248 NRF_SAADC_ACQTIME_10US = SAADC_CH_CONFIG_TACQ_10us, ///< 10 us.
249 NRF_SAADC_ACQTIME_15US = SAADC_CH_CONFIG_TACQ_15us, ///< 15 us.
250 NRF_SAADC_ACQTIME_20US = SAADC_CH_CONFIG_TACQ_20us, ///< 20 us.
251 NRF_SAADC_ACQTIME_40US = SAADC_CH_CONFIG_TACQ_40us ///< 40 us.
252 } nrf_saadc_acqtime_t;
253 #else
254 typedef uint16_t nrf_saadc_acqtime_t;
255 #endif
256
257 /** @brief Analog-to-digital converter channel mode. */
258 typedef enum
259 {
260 NRF_SAADC_MODE_SINGLE_ENDED = SAADC_CH_CONFIG_MODE_SE, ///< Single-ended mode. PSELN will be ignored, negative input to ADC shorted to GND.
261 NRF_SAADC_MODE_DIFFERENTIAL = SAADC_CH_CONFIG_MODE_Diff ///< Differential mode.
262 } nrf_saadc_mode_t;
263
264 /** @brief Analog-to-digital converter channel burst mode. */
265 typedef enum
266 {
267 NRF_SAADC_BURST_DISABLED = SAADC_CH_CONFIG_BURST_Disabled, ///< Burst mode is disabled (normal operation).
268 NRF_SAADC_BURST_ENABLED = SAADC_CH_CONFIG_BURST_Enabled ///< Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM.
269 } nrf_saadc_burst_t;
270
271 /** @brief Analog-to-digital converter tasks. */
272 typedef enum
273 {
274 #if NRF_SAADC_HAS_DMA_TASKS_EVENTS
275 NRF_SAADC_TASK_START = offsetof(NRF_SAADC_Type, TASKS_DMA.START), ///< Start the ADC and prepare the result buffer in RAM.
276 NRF_SAADC_TASK_STOP = offsetof(NRF_SAADC_Type, TASKS_DMA.STOP), ///< Stop the ADC and terminate any ongoing conversion.
277 #else
278 NRF_SAADC_TASK_START = offsetof(NRF_SAADC_Type, TASKS_START), ///< Start the ADC and prepare the result buffer in RAM.
279 NRF_SAADC_TASK_STOP = offsetof(NRF_SAADC_Type, TASKS_STOP), ///< Stop the ADC and terminate any ongoing conversion.
280 #endif
281 NRF_SAADC_TASK_SAMPLE = offsetof(NRF_SAADC_Type, TASKS_SAMPLE), ///< Take one ADC sample. If scan is enabled, all channels are sampled.
282 NRF_SAADC_TASK_CALIBRATEOFFSET = offsetof(NRF_SAADC_Type, TASKS_CALIBRATEOFFSET), ///< Starts offset auto-calibration.
283 } nrf_saadc_task_t;
284
285 /** @brief Analog-to-digital converter events. */
286 typedef enum
287 {
288 NRF_SAADC_EVENT_STARTED = offsetof(NRF_SAADC_Type, EVENTS_STARTED), ///< The ADC has started.
289 #if NRF_SAADC_HAS_DMA_TASKS_EVENTS
290 NRF_SAADC_EVENT_END = offsetof(NRF_SAADC_Type, EVENTS_DMA.END), ///< The ADC has filled up the result buffer.
291 #else
292 NRF_SAADC_EVENT_END = offsetof(NRF_SAADC_Type, EVENTS_END), ///< The ADC has filled up the result buffer.
293 #endif
294 NRF_SAADC_EVENT_DONE = offsetof(NRF_SAADC_Type, EVENTS_DONE), ///< A conversion task has been completed.
295 NRF_SAADC_EVENT_RESULTDONE = offsetof(NRF_SAADC_Type, EVENTS_RESULTDONE), ///< A result is ready to get transferred to RAM.
296 NRF_SAADC_EVENT_CALIBRATEDONE = offsetof(NRF_SAADC_Type, EVENTS_CALIBRATEDONE), ///< Calibration is complete.
297 NRF_SAADC_EVENT_STOPPED = offsetof(NRF_SAADC_Type, EVENTS_STOPPED), ///< The ADC has stopped.
298 NRF_SAADC_EVENT_CH0_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[0].LIMITH), ///< Last result is equal or above CH[0].LIMIT.HIGH.
299 NRF_SAADC_EVENT_CH0_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[0].LIMITL), ///< Last result is equal or below CH[0].LIMIT.LOW.
300 NRF_SAADC_EVENT_CH1_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[1].LIMITH), ///< Last result is equal or above CH[1].LIMIT.HIGH.
301 NRF_SAADC_EVENT_CH1_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[1].LIMITL), ///< Last result is equal or below CH[1].LIMIT.LOW.
302 NRF_SAADC_EVENT_CH2_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[2].LIMITH), ///< Last result is equal or above CH[2].LIMIT.HIGH.
303 NRF_SAADC_EVENT_CH2_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[2].LIMITL), ///< Last result is equal or below CH[2].LIMIT.LOW.
304 NRF_SAADC_EVENT_CH3_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[3].LIMITH), ///< Last result is equal or above CH[3].LIMIT.HIGH.
305 NRF_SAADC_EVENT_CH3_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[3].LIMITL), ///< Last result is equal or below CH[3].LIMIT.LOW.
306 NRF_SAADC_EVENT_CH4_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[4].LIMITH), ///< Last result is equal or above CH[4].LIMIT.HIGH.
307 NRF_SAADC_EVENT_CH4_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[4].LIMITL), ///< Last result is equal or below CH[4].LIMIT.LOW.
308 NRF_SAADC_EVENT_CH5_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[5].LIMITH), ///< Last result is equal or above CH[5].LIMIT.HIGH.
309 NRF_SAADC_EVENT_CH5_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[5].LIMITL), ///< Last result is equal or below CH[5].LIMIT.LOW.
310 NRF_SAADC_EVENT_CH6_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[6].LIMITH), ///< Last result is equal or above CH[6].LIMIT.HIGH.
311 NRF_SAADC_EVENT_CH6_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[6].LIMITL), ///< Last result is equal or below CH[6].LIMIT.LOW.
312 NRF_SAADC_EVENT_CH7_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[7].LIMITH), ///< Last result is equal or above CH[7].LIMIT.HIGH.
313 NRF_SAADC_EVENT_CH7_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[7].LIMITL) ///< Last result is equal or below CH[7].LIMIT.LOW.
314 } nrf_saadc_event_t;
315
316 /** @brief Analog-to-digital converter interrupt masks. */
317 typedef enum
318 {
319 NRF_SAADC_INT_STARTED = SAADC_INTENSET_STARTED_Msk, ///< Interrupt on EVENTS_STARTED event.
320 #if NRF_SAADC_HAS_DMA_TASKS_EVENTS
321 NRF_SAADC_INT_END = SAADC_INTENSET_DMAEND_Msk, ///< Interrupt on EVENTS_END event.
322 #else
323 NRF_SAADC_INT_END = SAADC_INTENSET_END_Msk, ///< Interrupt on EVENTS_END event.
324 #endif
325 NRF_SAADC_INT_DONE = SAADC_INTENSET_DONE_Msk, ///< Interrupt on EVENTS_DONE event.
326 NRF_SAADC_INT_RESULTDONE = SAADC_INTENSET_RESULTDONE_Msk, ///< Interrupt on EVENTS_RESULTDONE event.
327 NRF_SAADC_INT_CALIBRATEDONE = SAADC_INTENSET_CALIBRATEDONE_Msk, ///< Interrupt on EVENTS_CALIBRATEDONE event.
328 NRF_SAADC_INT_STOPPED = SAADC_INTENSET_STOPPED_Msk, ///< Interrupt on EVENTS_STOPPED event.
329 NRF_SAADC_INT_CH0LIMITH = SAADC_INTENSET_CH0LIMITH_Msk, ///< Interrupt on EVENTS_CH[0].LIMITH event.
330 NRF_SAADC_INT_CH0LIMITL = SAADC_INTENSET_CH0LIMITL_Msk, ///< Interrupt on EVENTS_CH[0].LIMITL event.
331 NRF_SAADC_INT_CH1LIMITH = SAADC_INTENSET_CH1LIMITH_Msk, ///< Interrupt on EVENTS_CH[1].LIMITH event.
332 NRF_SAADC_INT_CH1LIMITL = SAADC_INTENSET_CH1LIMITL_Msk, ///< Interrupt on EVENTS_CH[1].LIMITL event.
333 NRF_SAADC_INT_CH2LIMITH = SAADC_INTENSET_CH2LIMITH_Msk, ///< Interrupt on EVENTS_CH[2].LIMITH event.
334 NRF_SAADC_INT_CH2LIMITL = SAADC_INTENSET_CH2LIMITL_Msk, ///< Interrupt on EVENTS_CH[2].LIMITL event.
335 NRF_SAADC_INT_CH3LIMITH = SAADC_INTENSET_CH3LIMITH_Msk, ///< Interrupt on EVENTS_CH[3].LIMITH event.
336 NRF_SAADC_INT_CH3LIMITL = SAADC_INTENSET_CH3LIMITL_Msk, ///< Interrupt on EVENTS_CH[3].LIMITL event.
337 NRF_SAADC_INT_CH4LIMITH = SAADC_INTENSET_CH4LIMITH_Msk, ///< Interrupt on EVENTS_CH[4].LIMITH event.
338 NRF_SAADC_INT_CH4LIMITL = SAADC_INTENSET_CH4LIMITL_Msk, ///< Interrupt on EVENTS_CH[4].LIMITL event.
339 NRF_SAADC_INT_CH5LIMITH = SAADC_INTENSET_CH5LIMITH_Msk, ///< Interrupt on EVENTS_CH[5].LIMITH event.
340 NRF_SAADC_INT_CH5LIMITL = SAADC_INTENSET_CH5LIMITL_Msk, ///< Interrupt on EVENTS_CH[5].LIMITL event.
341 NRF_SAADC_INT_CH6LIMITH = SAADC_INTENSET_CH6LIMITH_Msk, ///< Interrupt on EVENTS_CH[6].LIMITH event.
342 NRF_SAADC_INT_CH6LIMITL = SAADC_INTENSET_CH6LIMITL_Msk, ///< Interrupt on EVENTS_CH[6].LIMITL event.
343 NRF_SAADC_INT_CH7LIMITH = SAADC_INTENSET_CH7LIMITH_Msk, ///< Interrupt on EVENTS_CH[7].LIMITH event.
344 NRF_SAADC_INT_CH7LIMITL = SAADC_INTENSET_CH7LIMITL_Msk, ///< Interrupt on EVENTS_CH[7].LIMITL event.
345 NRF_SAADC_INT_ALL = 0x7FFFFFFFUL ///< Mask of all interrupts.
346 } nrf_saadc_int_mask_t;
347
348 /** @brief Analog-to-digital converter value limit type. */
349 typedef enum
350 {
351 NRF_SAADC_LIMIT_LOW = 0, ///< Low limit type.
352 NRF_SAADC_LIMIT_HIGH = 1 ///< High limit type.
353 } nrf_saadc_limit_t;
354
355 /** @brief Type of a single ADC conversion result. */
356 typedef int16_t nrf_saadc_value_t;
357
358 /** @brief Analog-to-digital converter configuration structure. */
359 typedef struct
360 {
361 nrf_saadc_resolution_t resolution; ///< Resolution of samples.
362 nrf_saadc_oversample_t oversample; ///< Oversampling configuration.
363 nrf_saadc_value_t * buffer; ///< Pointer to sample buffer.
364 uint32_t buffer_size; ///< Size of the sample buffer.
365 } nrf_saadc_config_t;
366
367 /** @brief Analog-to-digital converter channel configuration structure. */
368 typedef struct
369 {
370 nrf_saadc_resistor_t resistor_p; ///< Resistor value on positive input.
371 nrf_saadc_resistor_t resistor_n; ///< Resistor value on negative input.
372 nrf_saadc_gain_t gain; ///< Gain control value.
373 nrf_saadc_reference_t reference; ///< Reference control value.
374 nrf_saadc_acqtime_t acq_time; ///< Acquisition time.
375 nrf_saadc_mode_t mode; ///< SAADC mode. Single-ended or differential.
376 nrf_saadc_burst_t burst; ///< Burst mode configuration.
377 #if NRF_SAADC_HAS_CONVTIME
378 uint8_t conv_time; ///< Conversion time.
379 #endif
380 } nrf_saadc_channel_config_t;
381
382
383 /**
384 * @brief Function for triggering the specified SAADC task.
385 *
386 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
387 * @param[in] task SAADC task.
388 */
389 NRF_STATIC_INLINE void nrf_saadc_task_trigger(NRF_SAADC_Type * p_reg,
390 nrf_saadc_task_t task);
391
392 /**
393 * @brief Function for getting the address of the specified SAADC task register.
394 *
395 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
396 * @param[in] task SAADC task.
397 *
398 * @return Address of the specified SAADC task.
399 */
400 NRF_STATIC_INLINE uint32_t nrf_saadc_task_address_get(NRF_SAADC_Type const * p_reg,
401 nrf_saadc_task_t task);
402
403 /**
404 * @brief Function for retrieving the state of the SAADC event.
405 *
406 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
407 * @param[in] event Event to be checked.
408 *
409 * @retval true The event has been generated.
410 * @retval false The event has not been generated.
411 */
412 NRF_STATIC_INLINE bool nrf_saadc_event_check(NRF_SAADC_Type const * p_reg,
413 nrf_saadc_event_t event);
414
415 /**
416 * @brief Function for clearing the specific SAADC event.
417 *
418 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
419 * @param[in] event SAADC event.
420 */
421 NRF_STATIC_INLINE void nrf_saadc_event_clear(NRF_SAADC_Type * p_reg,
422 nrf_saadc_event_t event);
423
424 /**
425 * @brief Function for getting the address of the specified SAADC event register.
426 *
427 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
428 * @param[in] event SAADC event.
429 *
430 * @return Address of the specified SAADC event.
431 */
432 NRF_STATIC_INLINE uint32_t nrf_saadc_event_address_get(NRF_SAADC_Type const * p_reg,
433 nrf_saadc_event_t event);
434
435 #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
436 /**
437 * @brief Function for setting the subscribe configuration for a given
438 * SAADC task.
439 *
440 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
441 * @param[in] task Task for which to set the configuration.
442 * @param[in] channel Channel through which to subscribe events.
443 */
444 NRF_STATIC_INLINE void nrf_saadc_subscribe_set(NRF_SAADC_Type * p_reg,
445 nrf_saadc_task_t task,
446 uint8_t channel);
447
448 /**
449 * @brief Function for clearing the subscribe configuration for a given
450 * SAADC task.
451 *
452 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
453 * @param[in] task Task for which to clear the configuration.
454 */
455 NRF_STATIC_INLINE void nrf_saadc_subscribe_clear(NRF_SAADC_Type * p_reg,
456 nrf_saadc_task_t task);
457
458 /**
459 * @brief Function for setting the publish configuration for a given
460 * SAADC event.
461 *
462 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
463 * @param[in] event Event for which to set the configuration.
464 * @param[in] channel Channel through which to publish the event.
465 */
466 NRF_STATIC_INLINE void nrf_saadc_publish_set(NRF_SAADC_Type * p_reg,
467 nrf_saadc_event_t event,
468 uint8_t channel);
469
470 /**
471 * @brief Function for clearing the publish configuration for a given
472 * SAADC event.
473 *
474 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
475 * @param[in] event Event for which to clear the configuration.
476 */
477 NRF_STATIC_INLINE void nrf_saadc_publish_clear(NRF_SAADC_Type * p_reg,
478 nrf_saadc_event_t event);
479 #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
480
481 /**
482 * @brief Function for getting the SAADC channel monitoring limit events.
483 *
484 * @param[in] channel Channel number.
485 * @param[in] limit_type Low limit or high limit.
486 *
487 * @return The SAADC channel monitoring limit event.
488 */
489 NRF_STATIC_INLINE nrf_saadc_event_t nrf_saadc_limit_event_get(uint8_t channel,
490 nrf_saadc_limit_t limit_type);
491
492 /**
493 * @brief Function for configuring the input pins for the specified SAADC channel.
494 *
495 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
496 * @param[in] channel Channel number.
497 * @param[in] pselp Positive input.
498 * @param[in] pseln Negative input. Set to @ref NRF_SAADC_INPUT_DISABLED in single ended mode.
499 */
500 NRF_STATIC_INLINE void nrf_saadc_channel_input_set(NRF_SAADC_Type * p_reg,
501 uint8_t channel,
502 nrf_saadc_input_t pselp,
503 nrf_saadc_input_t pseln);
504
505 /**
506 * @brief Function for configuring the positive input pin for the specified SAADC channel.
507 *
508 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
509 * @param[in] channel Channel number.
510 * @param[in] pselp Positive input.
511 */
512 NRF_STATIC_INLINE void nrf_saadc_channel_pos_input_set(NRF_SAADC_Type * p_reg,
513 uint8_t channel,
514 nrf_saadc_input_t pselp);
515
516 /**
517 * @brief Function for setting the SAADC channel monitoring limits.
518 *
519 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
520 * @param[in] channel Channel number.
521 * @param[in] low Low limit.
522 * @param[in] high High limit.
523 */
524 NRF_STATIC_INLINE void nrf_saadc_channel_limits_set(NRF_SAADC_Type * p_reg,
525 uint8_t channel,
526 int16_t low,
527 int16_t high);
528
529 /**
530 * @brief Function for setting the configuration of SAADC interrupts.
531 *
532 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
533 * @param[in] mask Interrupts configuration to be set.
534 */
535 NRF_STATIC_INLINE void nrf_saadc_int_set(NRF_SAADC_Type * p_reg, uint32_t mask);
536
537 /**
538 * @brief Function for enabling specified SAADC interrupts.
539 *
540 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
541 * @param[in] mask Mask of interrupts to be enabled.
542 */
543 NRF_STATIC_INLINE void nrf_saadc_int_enable(NRF_SAADC_Type * p_reg, uint32_t mask);
544
545 /**
546 * @brief Function for checking if the specified interrupts are enabled.
547 *
548 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
549 * @param[in] mask Mask of interrupts to be checked.
550 *
551 * @return Mask of enabled interrupts.
552 */
553 NRF_STATIC_INLINE uint32_t nrf_saadc_int_enable_check(NRF_SAADC_Type const * p_reg, uint32_t mask);
554
555 /**
556 * @brief Function for disabling specified interrupts.
557 *
558 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
559 * @param[in] mask Mask of interrupts to be disabled.
560 */
561 NRF_STATIC_INLINE void nrf_saadc_int_disable(NRF_SAADC_Type * p_reg, uint32_t mask);
562
563 /**
564 * @brief Function for generating masks for SAADC channel limit interrupts.
565 *
566 * @param[in] channel SAADC channel number.
567 * @param[in] limit_type Limit type.
568 *
569 * @return Interrupt mask.
570 */
571 NRF_STATIC_INLINE uint32_t nrf_saadc_limit_int_get(uint8_t channel,
572 nrf_saadc_limit_t limit_type);
573
574 /**
575 * @brief Function for checking whether the SAADC is busy.
576 *
577 * This function checks whether the analog-to-digital converter is busy with a conversion.
578 *
579 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
580 *
581 * @retval true The SAADC is busy.
582 * @retval false The SAADC is not busy.
583 */
584 NRF_STATIC_INLINE bool nrf_saadc_busy_check(NRF_SAADC_Type const * p_reg);
585
586 /**
587 * @brief Function for enabling the SAADC.
588 *
589 * The analog-to-digital converter must be enabled before use.
590 *
591 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
592 */
593 NRF_STATIC_INLINE void nrf_saadc_enable(NRF_SAADC_Type * p_reg);
594
595 /**
596 * @brief Function for disabling the SAADC.
597 *
598 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
599 */
600 NRF_STATIC_INLINE void nrf_saadc_disable(NRF_SAADC_Type * p_reg);
601
602 /**
603 * @brief Function for checking if the SAADC is enabled.
604 *
605 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
606 *
607 * @retval true The SAADC is enabled.
608 * @retval false The SAADC is not enabled.
609 */
610 NRF_STATIC_INLINE bool nrf_saadc_enable_check(NRF_SAADC_Type const * p_reg);
611
612 /**
613 * @brief Function for initializing the SAADC result buffer.
614 *
615 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
616 * @param[in] p_buffer Pointer to the result buffer.
617 * @param[in] size Size of the buffer (in 16-bit samples).
618 */
619 NRF_STATIC_INLINE void nrf_saadc_buffer_init(NRF_SAADC_Type * p_reg,
620 nrf_saadc_value_t * p_buffer,
621 uint32_t size);
622
623 /**
624 * @brief Function for setting the SAADC result buffer pointer.
625 *
626 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
627 * @param[in] p_buffer Pointer to the result buffer.
628 */
629 NRF_STATIC_INLINE void nrf_saadc_buffer_pointer_set(NRF_SAADC_Type * p_reg,
630 nrf_saadc_value_t * p_buffer);
631
632 /**
633 * @brief Function for getting the SAADC result buffer pointer.
634 *
635 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
636 *
637 * @return Pointer to the result buffer.
638 */
639 NRF_STATIC_INLINE nrf_saadc_value_t * nrf_saadc_buffer_pointer_get(NRF_SAADC_Type const * p_reg);
640
641 /**
642 * @brief Function for getting the number of samples written to the result
643 * buffer since the previous START task.
644 *
645 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
646 *
647 * @return Number of 16-bit samples written to the buffer.
648 */
649 NRF_STATIC_INLINE uint16_t nrf_saadc_amount_get(NRF_SAADC_Type const * p_reg);
650
651 /**
652 * @brief Function for setting the SAADC sample resolution.
653 *
654 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
655 * @param[in] resolution Bit resolution.
656 */
657 NRF_STATIC_INLINE void nrf_saadc_resolution_set(NRF_SAADC_Type * p_reg,
658 nrf_saadc_resolution_t resolution);
659
660 /**
661 * @brief Function for getting the SAADC sample resolution.
662 *
663 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
664 *
665 * @return Sample resolution.
666 */
667 NRF_STATIC_INLINE nrf_saadc_resolution_t nrf_saadc_resolution_get(NRF_SAADC_Type const * p_reg);
668
669 /**
670 * @brief Function for configuring the oversampling feature.
671 *
672 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
673 * @param[in] oversample Oversampling mode.
674 */
675 NRF_STATIC_INLINE void nrf_saadc_oversample_set(NRF_SAADC_Type * p_reg,
676 nrf_saadc_oversample_t oversample);
677
678 /**
679 * @brief Function for getting the oversampling feature configuration.
680 *
681 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
682 *
683 * @return Oversampling configuration.
684 */
685 NRF_STATIC_INLINE nrf_saadc_oversample_t nrf_saadc_oversample_get(NRF_SAADC_Type const * p_reg);
686
687 /**
688 * @brief Function for getting the sample count needed for one averaged result for a given
689 * oversampling configuration.
690 *
691 * @param[in] oversample Oversampling configuration.
692 *
693 * @return Sample count.
694 */
695 NRF_STATIC_INLINE uint32_t nrf_saadc_oversample_sample_count_get(nrf_saadc_oversample_t oversample);
696
697 /**
698 * @brief Function for enabling the continuous sampling.
699 *
700 * This function configures the SAADC internal timer to automatically take new samples at a fixed
701 * sample rate. Trigger the START task to begin continuous sampling. To stop the sampling, trigger
702 * the STOP task.
703 *
704 * @note The internal timer can only be used when a single input channel is enabled.
705 *
706 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
707 * @param[in] cc Capture and compare value. Sample rate is 16 MHz/cc.
708 * Valid @c CC range is from 80 to 2047.
709 */
710 NRF_STATIC_INLINE void nrf_saadc_continuous_mode_enable(NRF_SAADC_Type * p_reg,
711 uint16_t cc);
712
713 /**
714 * @brief Function for checking if the continuous sampling is enabled.
715 *
716 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
717 *
718 * @retval true The continuous sampling is enabled.
719 * @retval false The continuous sampling is disabled.
720 */
721 NRF_STATIC_INLINE bool nrf_saadc_continuous_mode_enable_check(NRF_SAADC_Type const * p_reg);
722
723 /**
724 * @brief Function for disabling the continuous sampling.
725 *
726 * New samples can still be acquired by manually triggering the SAMPLE task or by PPI.
727 *
728 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
729 */
730 NRF_STATIC_INLINE void nrf_saadc_continuous_mode_disable(NRF_SAADC_Type * p_reg);
731
732 #if NRF_SAADC_HAS_LIN_CAL
733 /**
734 * @brief Function for setting linearity calibration coefficient.
735 *
736 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
737 * @param[in] index Coefficient number.
738 * @param[in] coeff Value of the coefficient.
739 */
740 NRF_STATIC_INLINE void nrf_saadc_linearity_calibration_coeff_set(NRF_SAADC_Type * p_reg,
741 uint8_t index,
742 uint32_t coeff);
743
744 /**
745 * @brief Function for getting linearity calibration coefficient.
746 *
747 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
748 * @param[in] index Coefficient number.
749 *
750 * @return Value of the coefficient.
751 */
752 NRF_STATIC_INLINE uint32_t nrf_saadc_linearity_calibration_coeff_get(NRF_SAADC_Type const * p_reg,
753 uint8_t index);
754 #endif
755
756 /**
757 * @brief Function for initializing the SAADC channel.
758 *
759 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
760 * @param[in] channel Channel number.
761 * @param[in] config Pointer to the channel configuration structure.
762 */
763 NRF_STATIC_INLINE void nrf_saadc_channel_init(NRF_SAADC_Type * p_reg,
764 uint8_t channel,
765 nrf_saadc_channel_config_t const * config);
766
767 /**
768 * @brief Function for configuring the burst mode for the specified channel.
769 *
770 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
771 * @param[in] channel Channel number.
772 * @param[in] burst Burst mode setting.
773 */
774 NRF_STATIC_INLINE void nrf_saadc_burst_set(NRF_SAADC_Type * p_reg,
775 uint8_t channel,
776 nrf_saadc_burst_t burst);
777
778 /**
779 * @brief Function for getting the minimum value of the conversion result.
780 *
781 * The minimum value of the conversion result depends on the configured resolution.
782 *
783 * @param[in] resolution Bit resolution.
784 *
785 * @return Minimum value of the conversion result.
786 */
787 NRF_STATIC_INLINE nrf_saadc_value_t nrf_saadc_value_min_get(nrf_saadc_resolution_t resolution);
788
789 /**
790 * @brief Function for getting the maximum value of the conversion result.
791 *
792 * The maximum value of the conversion result depends on the configured resolution.
793 *
794 * @param[in] resolution Bit resolution.
795 *
796 * @return Maximum value of the conversion result.
797 */
798 NRF_STATIC_INLINE nrf_saadc_value_t nrf_saadc_value_max_get(nrf_saadc_resolution_t resolution);
799
800 #ifndef NRF_DECLARE_ONLY
801
nrf_saadc_task_trigger(NRF_SAADC_Type * p_reg,nrf_saadc_task_t task)802 NRF_STATIC_INLINE void nrf_saadc_task_trigger(NRF_SAADC_Type * p_reg, nrf_saadc_task_t task)
803 {
804 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
805 }
806
nrf_saadc_task_address_get(NRF_SAADC_Type const * p_reg,nrf_saadc_task_t task)807 NRF_STATIC_INLINE uint32_t nrf_saadc_task_address_get(NRF_SAADC_Type const * p_reg,
808 nrf_saadc_task_t task)
809 {
810 return (uint32_t)((uint8_t *)p_reg + (uint32_t)task);
811 }
812
nrf_saadc_event_check(NRF_SAADC_Type const * p_reg,nrf_saadc_event_t event)813 NRF_STATIC_INLINE bool nrf_saadc_event_check(NRF_SAADC_Type const * p_reg, nrf_saadc_event_t event)
814 {
815 return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
816 }
817
nrf_saadc_event_clear(NRF_SAADC_Type * p_reg,nrf_saadc_event_t event)818 NRF_STATIC_INLINE void nrf_saadc_event_clear(NRF_SAADC_Type * p_reg, nrf_saadc_event_t event)
819 {
820 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
821 nrf_event_readback((uint8_t *)p_reg + (uint32_t)event);
822 }
823
nrf_saadc_event_address_get(NRF_SAADC_Type const * p_reg,nrf_saadc_event_t event)824 NRF_STATIC_INLINE uint32_t nrf_saadc_event_address_get(NRF_SAADC_Type const * p_reg,
825 nrf_saadc_event_t event)
826 {
827 return (uint32_t )((uint8_t *)p_reg + (uint32_t)event);
828 }
829
830 #if defined(DPPI_PRESENT)
nrf_saadc_subscribe_set(NRF_SAADC_Type * p_reg,nrf_saadc_task_t task,uint8_t channel)831 NRF_STATIC_INLINE void nrf_saadc_subscribe_set(NRF_SAADC_Type * p_reg,
832 nrf_saadc_task_t task,
833 uint8_t channel)
834 {
835 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
836 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
837 }
838
nrf_saadc_subscribe_clear(NRF_SAADC_Type * p_reg,nrf_saadc_task_t task)839 NRF_STATIC_INLINE void nrf_saadc_subscribe_clear(NRF_SAADC_Type * p_reg, nrf_saadc_task_t task)
840 {
841 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0;
842 }
843
nrf_saadc_publish_set(NRF_SAADC_Type * p_reg,nrf_saadc_event_t event,uint8_t channel)844 NRF_STATIC_INLINE void nrf_saadc_publish_set(NRF_SAADC_Type * p_reg,
845 nrf_saadc_event_t event,
846 uint8_t channel)
847 {
848 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
849 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
850 }
851
nrf_saadc_publish_clear(NRF_SAADC_Type * p_reg,nrf_saadc_event_t event)852 NRF_STATIC_INLINE void nrf_saadc_publish_clear(NRF_SAADC_Type * p_reg, nrf_saadc_event_t event)
853 {
854 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0;
855 }
856 #endif // defined(DPPI_PRESENT)
857
nrf_saadc_limit_event_get(uint8_t channel,nrf_saadc_limit_t limit_type)858 NRF_STATIC_INLINE nrf_saadc_event_t nrf_saadc_limit_event_get(uint8_t channel,
859 nrf_saadc_limit_t limit_type)
860 {
861 if (limit_type == NRF_SAADC_LIMIT_HIGH)
862 {
863 return (nrf_saadc_event_t)NRFX_OFFSETOF(NRF_SAADC_Type, EVENTS_CH[channel].LIMITH);
864 }
865 else
866 {
867 return (nrf_saadc_event_t)NRFX_OFFSETOF(NRF_SAADC_Type, EVENTS_CH[channel].LIMITL);
868 }
869 }
870
nrf_saadc_channel_input_set(NRF_SAADC_Type * p_reg,uint8_t channel,nrf_saadc_input_t pselp,nrf_saadc_input_t pseln)871 NRF_STATIC_INLINE void nrf_saadc_channel_input_set(NRF_SAADC_Type * p_reg,
872 uint8_t channel,
873 nrf_saadc_input_t pselp,
874 nrf_saadc_input_t pseln)
875 {
876 #if NRF_SAADC_HAS_AIN_AS_PIN
877 p_reg->CH[channel].PSELN = (NRF_PIN_NUMBER_TO_PIN(pseln) << SAADC_CH_PSELP_PIN_Pos)
878 | (NRF_PIN_NUMBER_TO_PORT(pseln) << SAADC_CH_PSELP_PORT_Pos)
879 | (SAADC_CH_PSELP_CONNECT_AnalogInput << SAADC_CH_PSELP_CONNECT_Pos);
880 p_reg->CH[channel].PSELP = (NRF_PIN_NUMBER_TO_PIN(pselp) << SAADC_CH_PSELP_PIN_Pos)
881 | (NRF_PIN_NUMBER_TO_PORT(pselp) << SAADC_CH_PSELP_PORT_Pos)
882 | (SAADC_CH_PSELP_CONNECT_AnalogInput << SAADC_CH_PSELP_CONNECT_Pos);
883 #else
884 p_reg->CH[channel].PSELN = pseln;
885 p_reg->CH[channel].PSELP = pselp;
886 #endif
887 }
888
nrf_saadc_channel_pos_input_set(NRF_SAADC_Type * p_reg,uint8_t channel,nrf_saadc_input_t pselp)889 NRF_STATIC_INLINE void nrf_saadc_channel_pos_input_set(NRF_SAADC_Type * p_reg,
890 uint8_t channel,
891 nrf_saadc_input_t pselp)
892 {
893 #if NRF_SAADC_HAS_AIN_AS_PIN
894 p_reg->CH[channel].PSELP = (NRF_PIN_NUMBER_TO_PIN(pselp) << SAADC_CH_PSELP_PIN_Pos)
895 | (NRF_PIN_NUMBER_TO_PORT(pselp) << SAADC_CH_PSELP_PORT_Pos)
896 | (SAADC_CH_PSELP_CONNECT_AnalogInput << SAADC_CH_PSELP_CONNECT_Pos);
897 #else
898 p_reg->CH[channel].PSELP = pselp;
899 #endif
900 }
901
nrf_saadc_channel_limits_set(NRF_SAADC_Type * p_reg,uint8_t channel,int16_t low,int16_t high)902 NRF_STATIC_INLINE void nrf_saadc_channel_limits_set(NRF_SAADC_Type * p_reg,
903 uint8_t channel,
904 int16_t low,
905 int16_t high)
906 {
907 p_reg->CH[channel].LIMIT = (
908 (((uint32_t) low << SAADC_CH_LIMIT_LOW_Pos) & SAADC_CH_LIMIT_LOW_Msk)
909 | (((uint32_t) high << SAADC_CH_LIMIT_HIGH_Pos) & SAADC_CH_LIMIT_HIGH_Msk));
910 }
911
nrf_saadc_int_set(NRF_SAADC_Type * p_reg,uint32_t mask)912 NRF_STATIC_INLINE void nrf_saadc_int_set(NRF_SAADC_Type * p_reg, uint32_t mask)
913 {
914 p_reg->INTEN = mask;
915 }
916
nrf_saadc_int_enable(NRF_SAADC_Type * p_reg,uint32_t mask)917 NRF_STATIC_INLINE void nrf_saadc_int_enable(NRF_SAADC_Type * p_reg, uint32_t mask)
918 {
919 p_reg->INTENSET = mask;
920 }
921
nrf_saadc_int_enable_check(NRF_SAADC_Type const * p_reg,uint32_t mask)922 NRF_STATIC_INLINE uint32_t nrf_saadc_int_enable_check(NRF_SAADC_Type const * p_reg, uint32_t mask)
923 {
924 return p_reg->INTENSET & mask;
925 }
926
nrf_saadc_int_disable(NRF_SAADC_Type * p_reg,uint32_t mask)927 NRF_STATIC_INLINE void nrf_saadc_int_disable(NRF_SAADC_Type * p_reg, uint32_t mask)
928 {
929 p_reg->INTENCLR = mask;
930 }
931
nrf_saadc_limit_int_get(uint8_t channel,nrf_saadc_limit_t limit_type)932 NRF_STATIC_INLINE uint32_t nrf_saadc_limit_int_get(uint8_t channel,
933 nrf_saadc_limit_t limit_type)
934 {
935 NRFX_ASSERT(channel < SAADC_CH_NUM);
936 uint32_t mask = (limit_type == NRF_SAADC_LIMIT_LOW) ?
937 NRF_SAADC_INT_CH0LIMITL : NRF_SAADC_INT_CH0LIMITH;
938 return mask << (channel * 2);
939 }
940
nrf_saadc_busy_check(NRF_SAADC_Type const * p_reg)941 NRF_STATIC_INLINE bool nrf_saadc_busy_check(NRF_SAADC_Type const * p_reg)
942 {
943 return (p_reg->STATUS == (SAADC_STATUS_STATUS_Busy << SAADC_STATUS_STATUS_Pos));
944 }
945
nrf_saadc_enable(NRF_SAADC_Type * p_reg)946 NRF_STATIC_INLINE void nrf_saadc_enable(NRF_SAADC_Type * p_reg)
947 {
948 p_reg->ENABLE = (SAADC_ENABLE_ENABLE_Enabled << SAADC_ENABLE_ENABLE_Pos);
949 }
950
nrf_saadc_disable(NRF_SAADC_Type * p_reg)951 NRF_STATIC_INLINE void nrf_saadc_disable(NRF_SAADC_Type * p_reg)
952 {
953 p_reg->ENABLE = (SAADC_ENABLE_ENABLE_Disabled << SAADC_ENABLE_ENABLE_Pos);
954 }
955
nrf_saadc_enable_check(NRF_SAADC_Type const * p_reg)956 NRF_STATIC_INLINE bool nrf_saadc_enable_check(NRF_SAADC_Type const * p_reg)
957 {
958 return (p_reg->ENABLE == (SAADC_ENABLE_ENABLE_Enabled << SAADC_ENABLE_ENABLE_Pos));
959 }
960
nrf_saadc_buffer_init(NRF_SAADC_Type * p_reg,nrf_saadc_value_t * p_buffer,uint32_t size)961 NRF_STATIC_INLINE void nrf_saadc_buffer_init(NRF_SAADC_Type * p_reg,
962 nrf_saadc_value_t * p_buffer,
963 uint32_t size)
964 {
965 #if NRF_SAADC_HAS_DMA_REG
966 p_reg->DMA.PTR = (uint32_t)p_buffer;
967 p_reg->DMA.MAXCNT = size;
968 #else
969 p_reg->RESULT.PTR = (uint32_t)p_buffer;
970 p_reg->RESULT.MAXCNT = size;
971 #endif
972 }
973
nrf_saadc_buffer_pointer_set(NRF_SAADC_Type * p_reg,nrf_saadc_value_t * p_buffer)974 NRF_STATIC_INLINE void nrf_saadc_buffer_pointer_set(NRF_SAADC_Type * p_reg,
975 nrf_saadc_value_t * p_buffer)
976 {
977 #if NRF_SAADC_HAS_DMA_REG
978 p_reg->DMA.PTR = (uint32_t)p_buffer;
979 #else
980 p_reg->RESULT.PTR = (uint32_t)p_buffer;
981 #endif
982 }
983
nrf_saadc_buffer_pointer_get(NRF_SAADC_Type const * p_reg)984 NRF_STATIC_INLINE nrf_saadc_value_t * nrf_saadc_buffer_pointer_get(NRF_SAADC_Type const * p_reg)
985 {
986 #if NRF_SAADC_HAS_DMA_REG
987 return (nrf_saadc_value_t *)p_reg->DMA.PTR;
988 #else
989 return (nrf_saadc_value_t *)p_reg->RESULT.PTR;
990 #endif
991 }
992
nrf_saadc_amount_get(NRF_SAADC_Type const * p_reg)993 NRF_STATIC_INLINE uint16_t nrf_saadc_amount_get(NRF_SAADC_Type const * p_reg)
994 {
995 #if NRF_SAADC_HAS_DMA_REG
996 return (uint16_t)p_reg->DMA.AMOUNT;
997 #else
998 return (uint16_t)p_reg->RESULT.AMOUNT;
999 #endif
1000 }
1001
nrf_saadc_resolution_set(NRF_SAADC_Type * p_reg,nrf_saadc_resolution_t resolution)1002 NRF_STATIC_INLINE void nrf_saadc_resolution_set(NRF_SAADC_Type * p_reg,
1003 nrf_saadc_resolution_t resolution)
1004 {
1005 p_reg->RESOLUTION = resolution;
1006 }
1007
nrf_saadc_resolution_get(NRF_SAADC_Type const * p_reg)1008 NRF_STATIC_INLINE nrf_saadc_resolution_t nrf_saadc_resolution_get(NRF_SAADC_Type const * p_reg)
1009 {
1010 return (nrf_saadc_resolution_t)p_reg->RESOLUTION;
1011 }
1012
nrf_saadc_oversample_set(NRF_SAADC_Type * p_reg,nrf_saadc_oversample_t oversample)1013 NRF_STATIC_INLINE void nrf_saadc_oversample_set(NRF_SAADC_Type * p_reg,
1014 nrf_saadc_oversample_t oversample)
1015 {
1016 p_reg->OVERSAMPLE = oversample;
1017 }
1018
nrf_saadc_oversample_get(NRF_SAADC_Type const * p_reg)1019 NRF_STATIC_INLINE nrf_saadc_oversample_t nrf_saadc_oversample_get(NRF_SAADC_Type const * p_reg)
1020 {
1021 return (nrf_saadc_oversample_t)p_reg->OVERSAMPLE;
1022 }
1023
nrf_saadc_oversample_sample_count_get(nrf_saadc_oversample_t oversample)1024 NRF_STATIC_INLINE uint32_t nrf_saadc_oversample_sample_count_get(nrf_saadc_oversample_t oversample)
1025 {
1026 return (1 << (uint32_t)oversample);
1027 }
1028
nrf_saadc_continuous_mode_enable(NRF_SAADC_Type * p_reg,uint16_t cc)1029 NRF_STATIC_INLINE void nrf_saadc_continuous_mode_enable(NRF_SAADC_Type * p_reg, uint16_t cc)
1030 {
1031 NRFX_ASSERT((cc >= 80) && (cc <= 2047));
1032 p_reg->SAMPLERATE = (SAADC_SAMPLERATE_MODE_Timers << SAADC_SAMPLERATE_MODE_Pos)
1033 | ((uint32_t)cc << SAADC_SAMPLERATE_CC_Pos);
1034 }
1035
nrf_saadc_continuous_mode_enable_check(NRF_SAADC_Type const * p_reg)1036 NRF_STATIC_INLINE bool nrf_saadc_continuous_mode_enable_check(NRF_SAADC_Type const * p_reg)
1037 {
1038 return (bool)((p_reg->SAMPLERATE & SAADC_SAMPLERATE_MODE_Msk)
1039 == (SAADC_SAMPLERATE_MODE_Timers << SAADC_SAMPLERATE_MODE_Pos));
1040 }
1041
nrf_saadc_continuous_mode_disable(NRF_SAADC_Type * p_reg)1042 NRF_STATIC_INLINE void nrf_saadc_continuous_mode_disable(NRF_SAADC_Type * p_reg)
1043 {
1044 p_reg->SAMPLERATE = SAADC_SAMPLERATE_MODE_Task << SAADC_SAMPLERATE_MODE_Pos;
1045 }
1046
1047 #if NRF_SAADC_HAS_LIN_CAL
nrf_saadc_linearity_calibration_coeff_set(NRF_SAADC_Type * p_reg,uint8_t index,uint32_t coeff)1048 NRF_STATIC_INLINE void nrf_saadc_linearity_calibration_coeff_set(NRF_SAADC_Type * p_reg,
1049 uint8_t index,
1050 uint32_t coeff)
1051 {
1052 NRFX_ASSERT(index < NRF_SAADC_LIN_CAL_MAX_COUNT);
1053 NRFX_ASSERT(coeff <= NRF_SAADC_LIN_CAL_MAX);
1054 p_reg->TRIM.LINCALCOEFF[index] = coeff;
1055 }
1056
nrf_saadc_linearity_calibration_coeff_get(NRF_SAADC_Type const * p_reg,uint8_t index)1057 NRF_STATIC_INLINE uint32_t nrf_saadc_linearity_calibration_coeff_get(NRF_SAADC_Type const * p_reg,
1058 uint8_t index)
1059 {
1060 NRFX_ASSERT(index < NRF_SAADC_LIN_CAL_MAX_COUNT);
1061 return p_reg->TRIM.LINCALCOEFF[index];
1062 }
1063 #endif
1064
nrf_saadc_channel_init(NRF_SAADC_Type * p_reg,uint8_t channel,nrf_saadc_channel_config_t const * config)1065 NRF_STATIC_INLINE void nrf_saadc_channel_init(NRF_SAADC_Type * p_reg,
1066 uint8_t channel,
1067 nrf_saadc_channel_config_t const * config)
1068 {
1069 #if !NRF_SAADC_HAS_ACQTIME_ENUM
1070 NRFX_ASSERT(config->acq_time <= NRF_SAADC_ACQTIME_MAX);
1071 #endif
1072 #if NRF_SAADC_HAS_CONVTIME
1073 NRFX_ASSERT(config->conv_time <= NRF_SAADC_CONVTIME_MAX);
1074 #endif
1075 p_reg->CH[channel].CONFIG =
1076 ((config->resistor_p << SAADC_CH_CONFIG_RESP_Pos) & SAADC_CH_CONFIG_RESP_Msk)
1077 | ((config->resistor_n << SAADC_CH_CONFIG_RESN_Pos) & SAADC_CH_CONFIG_RESN_Msk)
1078 | ((config->gain << SAADC_CH_CONFIG_GAIN_Pos) & SAADC_CH_CONFIG_GAIN_Msk)
1079 | ((config->reference << SAADC_CH_CONFIG_REFSEL_Pos) & SAADC_CH_CONFIG_REFSEL_Msk)
1080 | ((config->acq_time << SAADC_CH_CONFIG_TACQ_Pos) & SAADC_CH_CONFIG_TACQ_Msk)
1081 #if NRF_SAADC_HAS_CONVTIME
1082 | ((config->conv_time << SAADC_CH_CONFIG_TCONV_Pos) & SAADC_CH_CONFIG_TCONV_Msk)
1083 #endif
1084 | ((config->mode << SAADC_CH_CONFIG_MODE_Pos) & SAADC_CH_CONFIG_MODE_Msk)
1085 | ((config->burst << SAADC_CH_CONFIG_BURST_Pos) & SAADC_CH_CONFIG_BURST_Msk);
1086 }
1087
nrf_saadc_burst_set(NRF_SAADC_Type * p_reg,uint8_t channel,nrf_saadc_burst_t burst)1088 NRF_STATIC_INLINE void nrf_saadc_burst_set(NRF_SAADC_Type * p_reg,
1089 uint8_t channel,
1090 nrf_saadc_burst_t burst)
1091 {
1092 p_reg->CH[channel].CONFIG = (p_reg->CH[channel].CONFIG & ~SAADC_CH_CONFIG_BURST_Msk) |
1093 (burst << SAADC_CH_CONFIG_BURST_Pos);
1094 }
1095
nrf_saadc_value_min_get(nrf_saadc_resolution_t resolution)1096 NRF_STATIC_INLINE nrf_saadc_value_t nrf_saadc_value_min_get(nrf_saadc_resolution_t resolution)
1097 {
1098 uint8_t res_bits = 0;
1099 switch (resolution)
1100 {
1101 case NRF_SAADC_RESOLUTION_8BIT:
1102 res_bits = 8;
1103 break;
1104 case NRF_SAADC_RESOLUTION_10BIT:
1105 res_bits = 10;
1106 break;
1107 case NRF_SAADC_RESOLUTION_12BIT:
1108 res_bits = 12;
1109 break;
1110 case NRF_SAADC_RESOLUTION_14BIT:
1111 res_bits = 14;
1112 break;
1113 default:
1114 NRFX_ASSERT(false);
1115 }
1116 return (nrf_saadc_value_t)(-(1 << res_bits));
1117 }
1118
nrf_saadc_value_max_get(nrf_saadc_resolution_t resolution)1119 NRF_STATIC_INLINE nrf_saadc_value_t nrf_saadc_value_max_get(nrf_saadc_resolution_t resolution)
1120 {
1121 uint8_t res_bits = 0;
1122 switch (resolution)
1123 {
1124 case NRF_SAADC_RESOLUTION_8BIT:
1125 res_bits = 8;
1126 break;
1127 case NRF_SAADC_RESOLUTION_10BIT:
1128 res_bits = 10;
1129 break;
1130 case NRF_SAADC_RESOLUTION_12BIT:
1131 res_bits = 12;
1132 break;
1133 case NRF_SAADC_RESOLUTION_14BIT:
1134 res_bits = 14;
1135 break;
1136 default:
1137 NRFX_ASSERT(false);
1138 }
1139 return (nrf_saadc_value_t)((1 << res_bits) - 1);
1140 }
1141
1142 #endif // NRF_DECLARE_ONLY
1143
1144 /** @} */
1145
1146 #ifdef __cplusplus
1147 }
1148 #endif
1149
1150 #endif // NRF_SAADC_H_
1151
