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Searched refs:mec_espi_io_regs (Results 1 – 16 of 16) sorted by relevance

/hal_microchip-latest/mec5/drivers/
Dmec_espi_pc.h20 struct mec_espi_io_regs;
106 void mec_hal_espi_pc_ready_set(struct mec_espi_io_regs *iobase);
108 int mec_hal_espi_pc_is_ready(struct mec_espi_io_regs *iobase);
113 uint32_t mec_hal_espi_pc_en_status(struct mec_espi_io_regs *iobase);
114 uint32_t mec_hal_espi_pc_bm_status(struct mec_espi_io_regs *iobase);
117 uint32_t mec_hal_espi_pc_status(struct mec_espi_io_regs *iobase);
118 void mec_hal_espi_pc_status_clr(struct mec_espi_io_regs *iobase, uint32_t bitmap);
119 void mec_hal_espi_pc_status_clr_all(struct mec_espi_io_regs *iobase);
121 void mec_hal_espi_pc_intr_en(struct mec_espi_io_regs *iobase, uint32_t bitmap);
122 void mec_hal_espi_pc_intr_dis(struct mec_espi_io_regs *iobase, uint32_t bitmap);
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Dmec_espi_oob.h20 struct mec_espi_io_regs;
61 void mec_hal_espi_oob_ready_set(struct mec_espi_io_regs *iobase);
62 int mec_hal_espi_oob_is_ready(struct mec_espi_io_regs *iobase);
67 uint32_t mec_hal_espi_oob_en_status(struct mec_espi_io_regs *iobase);
69 uint32_t mec_hal_espi_oob_max_pkt_size(struct mec_espi_io_regs *iobase);
71 int mec_hal_espi_oob_buffer_set(struct mec_espi_io_regs *iobase, uint8_t dir,
73 void mec_hal_espi_oob_rx_buffer_avail(struct mec_espi_io_regs *iobase);
75 void mec_hal_espi_oob_intr_ctrl(struct mec_espi_io_regs *iobase, uint32_t msk, uint8_t en);
77 void mec_hal_espi_oob_tx_start(struct mec_espi_io_regs *iobase, uint8_t tag, uint8_t start);
80 uint8_t mec_hal_espi_oob_rx_tag(struct mec_espi_io_regs *iobase);
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Dmec_espi_fc.h20 struct mec_espi_io_regs;
57 void mec_hal_espi_fc_ready_set(struct mec_espi_io_regs *iobase);
58 int mec_hal_espi_fc_is_ready(struct mec_espi_io_regs *iobase);
61 uint32_t mec_hal_espi_fc_en_status(struct mec_espi_io_regs *iobase);
68 uint32_t mec_hal_espi_fc_max_read_req_sz(struct mec_espi_io_regs *iobase);
69 uint32_t mec_hal_espi_fc_max_pld_sz(struct mec_espi_io_regs *iobase);
71 int mec_hal_espi_fc_is_busy(struct mec_espi_io_regs *iobase);
72 void mec_hal_espi_fc_op_start(struct mec_espi_io_regs *iobase, uint32_t flags);
73 void mec_hal_espi_fc_op_abort(struct mec_espi_io_regs *iobase);
74 void mec_hal_espi_fc_intr_ctrl(struct mec_espi_io_regs *iobase, uint32_t msk, uint8_t en);
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Dmec_espi_pc.c41 void mec_hal_espi_pc_ready_set(struct mec_espi_io_regs *iobase) in mec_hal_espi_pc_ready_set()
46 int mec_hal_espi_pc_is_ready(struct mec_espi_io_regs *iobase) in mec_hal_espi_pc_is_ready()
58 uint32_t mec_hal_espi_pc_en_status(struct mec_espi_io_regs *iobase) in mec_hal_espi_pc_en_status()
70 uint32_t mec_hal_espi_pc_bm_status(struct mec_espi_io_regs *iobase) in mec_hal_espi_pc_bm_status()
78 uint32_t mec_hal_espi_pc_status(struct mec_espi_io_regs *iobase) in mec_hal_espi_pc_status()
102 void mec_hal_espi_pc_status_clr(struct mec_espi_io_regs *iobase, uint32_t bitmap) in mec_hal_espi_pc_status_clr()
110 void mec_hal_espi_pc_intr_en(struct mec_espi_io_regs *iobase, uint32_t bitmap) in mec_hal_espi_pc_intr_en()
118 void mec_hal_espi_pc_intr_dis(struct mec_espi_io_regs *iobase, uint32_t bitmap) in mec_hal_espi_pc_intr_dis()
126 void mec_hal_espi_pc_status_clr_all(struct mec_espi_io_regs *iobase) in mec_hal_espi_pc_status_clr_all()
133 uint64_t mec_hal_espi_pc_error_addr(struct mec_espi_io_regs *iobase) in mec_hal_espi_pc_error_addr()
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Dmec_espi.c19 static void set_supported_channels(struct mec_espi_io_regs *iobase, uint32_t capabilities) in set_supported_channels()
44 static void set_supported_max_freq(struct mec_espi_io_regs *iobase, uint32_t capabilities) in set_supported_max_freq()
58 static uint32_t get_max_freq(struct mec_espi_io_regs *iobase) in get_max_freq()
66 static void set_supported_io_modes(struct mec_espi_io_regs *iobase, uint32_t capabilities) in set_supported_io_modes()
80 static uint32_t get_supported_io_modes(struct mec_espi_io_regs *iobase) in get_supported_io_modes()
88 static void set_supported_alert_io_pin_mode(struct mec_espi_io_regs *iobase, uint32_t capabilities) in set_supported_alert_io_pin_mode()
99 static void set_pc_capabilities(struct mec_espi_io_regs *iobase, uint32_t capabilities) in set_pc_capabilities()
110 static uint32_t get_pc_max_pld_size(struct mec_espi_io_regs *iobase) in get_pc_max_pld_size()
118 static void set_vw_capabilities(struct mec_espi_io_regs *iobase, uint32_t capabilities) in set_vw_capabilities()
129 static uint32_t get_vw_groups_max_cnt(struct mec_espi_io_regs *iobase) in get_vw_groups_max_cnt()
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Dmec_espi_fc.c61 uint32_t mec_hal_espi_fc_en_status(struct mec_espi_io_regs *iobase) in mec_hal_espi_fc_en_status()
66 void mec_hal_espi_fc_ready_set(struct mec_espi_io_regs *iobase) in mec_hal_espi_fc_ready_set()
71 int mec_hal_espi_fc_is_ready(struct mec_espi_io_regs *iobase) in mec_hal_espi_fc_is_ready()
80 int mec_hal_espi_fc_is_busy(struct mec_espi_io_regs *iobase) in mec_hal_espi_fc_is_busy()
96 void mec_hal_espi_fc_op_start(struct mec_espi_io_regs *iobase, uint32_t flags) in mec_hal_espi_fc_op_start()
109 void mec_hal_espi_fc_op_abort(struct mec_espi_io_regs *iobase) in mec_hal_espi_fc_op_abort()
114 void mec_hal_espi_fc_intr_ctrl(struct mec_espi_io_regs *iobase, uint32_t msk, uint8_t en) in mec_hal_espi_fc_intr_ctrl()
136 uint32_t mec_hal_espi_fc_status(struct mec_espi_io_regs *iobase) in mec_hal_espi_fc_status()
145 void mec_hal_espi_fc_status_clr(struct mec_espi_io_regs *iobase, uint32_t msk) in mec_hal_espi_fc_status_clr()
165 uint32_t mec_hal_espi_fc_max_read_req_sz(struct mec_espi_io_regs *iobase) in mec_hal_espi_fc_max_read_req_sz()
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Dmec_espi_oob.c100 void mec_hal_espi_oob_ready_set(struct mec_espi_io_regs *iobase) in mec_hal_espi_oob_ready_set()
105 int mec_hal_espi_oob_is_ready(struct mec_espi_io_regs *iobase) in mec_hal_espi_oob_is_ready()
118 uint32_t mec_hal_espi_oob_en_status(struct mec_espi_io_regs *iobase) in mec_hal_espi_oob_en_status()
135 uint32_t mec_hal_espi_oob_max_pkt_size(struct mec_espi_io_regs *iobase) in mec_hal_espi_oob_max_pkt_size()
159 int mec_hal_espi_oob_buffer_set(struct mec_espi_io_regs *iobase, uint8_t dir, in mec_hal_espi_oob_buffer_set()
202 void mec_hal_espi_oob_rx_buffer_avail(struct mec_espi_io_regs *iobase) in mec_hal_espi_oob_rx_buffer_avail()
210 void mec_hal_espi_oob_intr_ctrl(struct mec_espi_io_regs *iobase, uint32_t msk, uint8_t en) in mec_hal_espi_oob_intr_ctrl()
236 void mec_hal_espi_oob_tx_start(struct mec_espi_io_regs *iobase, uint8_t tag, uint8_t start) in mec_hal_espi_oob_tx_start()
249 int mec_hal_espi_oob_tx_is_busy(struct mec_espi_io_regs *iobase) in mec_hal_espi_oob_tx_is_busy()
258 uint8_t mec_hal_espi_oob_rx_tag(struct mec_espi_io_regs *iobase) in mec_hal_espi_oob_rx_tag()
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Dmec_espi_core.h20 struct mec_espi_io_regs;
253 struct mec_espi_io_regs *iobase;
269 int mec_hal_espi_capability_set(struct mec_espi_io_regs *iobase,
272 int mec_hal_espi_capability_get(struct mec_espi_io_regs *iobase,
275 int mec_hal_espi_cap_set(struct mec_espi_io_regs *iobase, enum mec_espi_cap_id id, uint32_t cfg);
276 uint32_t mec_hal_espi_cap_get(struct mec_espi_io_regs *iobase, enum mec_espi_cap_id id);
278 void mec_hal_espi_reset_change_clr(struct mec_espi_io_regs *iobase);
279 void mec_hal_espi_reset_change_intr_en(struct mec_espi_io_regs *iobase, uint8_t enable);
286 uint32_t mec_hal_espi_reset_state(struct mec_espi_io_regs *iobase);
291 void mec_hal_espi_activate(struct mec_espi_io_regs *iobase, uint8_t enable);
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Dmec_espi_host_dev.c92 static uint8_t mec_espi_sirq_get(struct mec_espi_io_regs *iobase, uint8_t sirq_idx) in mec_espi_sirq_get()
102 static void espi_sirq_set(struct mec_espi_io_regs *iobase, uint8_t sirq_idx, uint8_t slot) in espi_sirq_set()
113 int mec_hal_espi_iobar_cfg(struct mec_espi_io_regs *base, uint8_t ldn, in mec_hal_espi_iobar_cfg()
140 int mec_hal_espi_iobar_enable(struct mec_espi_io_regs *base, uint8_t ldn, uint8_t enable) in mec_hal_espi_iobar_enable()
164 int mec_hal_espi_iobar_is_enabled(struct mec_espi_io_regs *base, uint8_t ldn) in mec_hal_espi_iobar_is_enabled()
185 uint32_t mec_hal_espi_iobar_mask(struct mec_espi_io_regs *base, uint8_t ldn) in mec_hal_espi_iobar_mask()
208 int mec_hal_espi_iobar_mask_set(struct mec_espi_io_regs *base, uint8_t ldn, uint8_t mask) in mec_hal_espi_iobar_mask_set()
380 int mec_hal_espi_bar_inhibit(struct mec_espi_io_regs *base, uint8_t ldn, uint8_t inhibit) in mec_hal_espi_bar_inhibit()
410 int mec_hal_espi_bar_inhibit_msk(struct mec_espi_io_regs *base, uint8_t inhibit, in mec_hal_espi_bar_inhibit_msk()
431 uint8_t mec_hal_espi_ld_sirq_num(struct mec_espi_io_regs *iobase, uint8_t ldn) in mec_hal_espi_ld_sirq_num()
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Dmec_espi_vw.h21 struct mec_espi_io_regs;
209 int mec_hal_espi_vw_is_enabled(struct mec_espi_io_regs * const iobase);
210 uint32_t mec_hal_espi_vw_en_status(struct mec_espi_io_regs * const iobase);
215 void mec_hal_espi_vw_ready_set(struct mec_espi_io_regs * const iobase);
216 int mec_hal_espi_vw_is_ready(struct mec_espi_io_regs * const iobase);
Dmec_acpi_ec.c239 struct mec_espi_io_regs *espi_io_base = (struct mec_espi_io_regs *)MEC_ESPI_IO_BASE; in mec_hal_acpi_ec_is_enabled()
Dmec_espi_taf.c189 struct mec_espi_io_regs *ioregs = (struct mec_espi_io_regs *)(MEC_ESPI_IO_BASE); in mec_hal_espi_taf_init()
Dmec_espi_taf.h22 struct mec_espi_io_regs;
Dmec_espi_vw.c61 int mec_hal_espi_vw_is_enabled(struct mec_espi_io_regs *const iobase) in mec_hal_espi_vw_is_enabled()
75 uint32_t mec_hal_espi_vw_en_status(struct mec_espi_io_regs *const iobase) in mec_hal_espi_vw_en_status()
106 void mec_hal_espi_vw_ready_set(struct mec_espi_io_regs * const iobase) in mec_hal_espi_vw_ready_set()
111 int mec_hal_espi_vw_is_ready(struct mec_espi_io_regs * const iobase) in mec_hal_espi_vw_is_ready()
/hal_microchip-latest/mec5/devices/common/
Dmec5_espi_io_v1_5.h17 typedef struct mec_espi_io_regs { /*!< (@ 0x400F3400) MEC_ESPI_IO Structure … struct
Dmec5_espi_io_v1_4.h17 typedef struct mec_espi_io_regs { /*!< (@ 0x400F3400) MEC_ESPI_IO Structure … struct