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Searched refs:addcmd_status0 (Results 1 – 3 of 3) sorted by relevance

/hal_microchip-latest/mpfs/mpfs_hal/common/nwc/
Dmss_ddr_debug.c657 CFG_DDR_SGMII_PHY->addcmd_status0.addcmd_status0); in tip_register_status()
Dmss_ddr.c1813 ((CFG_DDR_SGMII_PHY->addcmd_status0.addcmd_status0)&0xFFU),\ in ddr_setup()
1814 ((CFG_DDR_SGMII_PHY->addcmd_status0.addcmd_status0>>8U)&0xFFU), \ in ddr_setup()
1815 ((CFG_DDR_SGMII_PHY->addcmd_status0.addcmd_status0>>16U)&0xFFU),\ in ddr_setup()
1816 ((CFG_DDR_SGMII_PHY->addcmd_status0.addcmd_status0>>24U)&0xFFU),\ in ddr_setup()
Dmss_ddr_sgmii_phy_defs.h3685 __I uint32_t addcmd_status0; member
4637 …__I CFG_DDR_SGMII_PHY_addcmd_status0_TypeDef addcmd_status0; … member