Searched refs:__IM (Results 1 – 25 of 64) sorted by relevance
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18 …__IM uint8_t HSTS1; /*!< (@ 0x00000000) ACPI PM1 status 1 …20 …__IM uint8_t HEN1; /*!< (@ 0x00000002) ACPI PM1 status 1 …22 …__IM uint8_t HCTRL1; /*!< (@ 0x00000004) ACPI PM1 control 1 …24 …__IM uint8_t HP2CTRL1; /*!< (@ 0x00000006) ACPI PM1 power-man 2 control 1 …25 …__IM uint8_t HP2CTRL2; /*!< (@ 0x00000007) ACPI PM1 power-man 2 control 2 …26 __IM uint8_t RESERVED[248];27 …__IM uint8_t ESTS1; /*!< (@ 0x00000100) EC-only: ACPI PM1 status 1 …29 …__IM uint8_t EEN1; /*!< (@ 0x00000102) EC-only: ACPI PM1 status 1 …31 …__IM uint8_t ECTRL1; /*!< (@ 0x00000104) EC-only: ACPI PM1 control 1 …33 …__IM uint8_t EP2CTRL1; /*!< (@ 0x00000106) EC-only: ACPI PM1 power-man 2 co…[all …]
19 __IM uint32_t RESERVED[63];20 …__IM uint32_t DATRB; /*!< (@ 0x00000100) BDP EC-only: data with attribute…22 …__IM uint8_t STATUS; /*!< (@ 0x00000108) BDP EC-only: status(RO) …24 __IM uint16_t RESERVED1;25 …__IM uint32_t SNAP; /*!< (@ 0x0000010C) BDP EC-only: snapshot register …27 __IM uint32_t RESERVED2[135];29 __IM uint8_t RESERVED3;30 __IM uint16_t RESERVED4;31 __IM uint32_t RESERVED5[51];33 __IM uint32_t RESERVED6[203];[all …]
19 __IM uint8_t RSVD1[3];21 __IM uint8_t RSVD2[3];23 __IM uint8_t RSVD3[3];25 __IM uint8_t RSVD4[3];26 …__IM uint8_t STATUS2; /*!< (@ 0x00000010) PECI status 2 …27 __IM uint8_t RSVD5[3];29 __IM uint8_t RSVD6[3];31 __IM uint8_t RSVD7[3];33 __IM uint8_t RSVD8[3];35 __IM uint8_t RSVD9[3];[all …]
18 __IM uint32_t RESERVED;19 __IM uint16_t RESERVED1;20 __IM uint8_t RESERVED2;22 __IM uint32_t RESERVED3[5];23 …__IM uint32_t DEVID; /*!< (@ 0x0000001C) Chip config device ID and revisi…24 …__IM uint8_t LEGID; /*!< (@ 0x00000020) Chip config legacy ID …25 __IM uint8_t RESERVED4;26 __IM uint16_t RESERVED5;27 …__IM uint8_t OTPID; /*!< (@ 0x00000024) Chip config OTP ID …28 …__IM uint8_t VDID; /*!< (@ 0x00000025) Chip config validation ID …[all …]
20 __IM uint16_t RESERVED;21 __IM uint32_t RESERVED1[63];23 __IM uint8_t RESERVED2;24 __IM uint16_t RESERVED3;26 __IM uint8_t RESERVED4;27 __IM uint16_t RESERVED5;29 __IM uint8_t RESERVED6;30 __IM uint16_t RESERVED7;32 __IM uint8_t RESERVED8;33 __IM uint16_t RESERVED9;
19 …__IM uint32_t HW_CAP; /*!< (@ 0x00000008) I3C Host controller hardware cap…25 …__IM uint32_t RX_DATA; /*!< (@ 0x00000014) Receive data register …31 __IM uint32_t RESERVED[3];33 __IM uint32_t RESERVED1;41 __IM uint32_t RESERVED2;44 __IM uint32_t RESERVED3[2];46 __IM uint32_t RESERVED4[16];52 __IM uint32_t RESERVED5;59 …__IM uint32_t VER_ID; /*!< (@ 0x000000E0) I3C version ID register …60 …__IM uint32_t VER_TYPE; /*!< (@ 0x000000E4) I3C version type register …[all …]
19 …__IM uint32_t HW_CAP; /*!< (@ 0x00000008) I3C Host controller hardware cap…25 …__IM uint32_t RX_DATA; /*!< (@ 0x00000014) Receive data register …31 __IM uint32_t RESERVED[3];41 __IM uint32_t RESERVED1;44 __IM uint32_t RESERVED2[2];52 __IM uint32_t RESERVED3;54 __IM uint32_t RESERVED4;57 __IM uint32_t RESERVED5[5];63 __IM uint32_t RESERVED6;70 …__IM uint32_t VER_ID; /*!< (@ 0x000000E0) I3C version ID register …[all …]
17 …__IM uint16_t LDN_MSK; /*!< (@ 0x00000000) eSPI Memory BAR LDN and address …19 …__IM uint16_t RSVD_H1; /*!< (@ 0x00000002) Bits[31:16] reserved …20 …__IM uint16_t RSVD_H2; /*!< (@ 0x00000004) Bits[47:32] reserved …21 …__IM uint16_t RSVD_H3; /*!< (@ 0x00000006) Bits[63:48] reserved …22 …__IM uint16_t RSVD_H4; /*!< (@ 0x00000008) Bits[79:64] reserved …34 __IM uint16_t RESERVED[2];54 …__IM uint16_t VASZ; /*!< (@ 0x00000000) 16-bit register with valid(enabl…59 __IM uint16_t RESERVED[2];73 __IM uint32_t RESERVED[76];74 …__IM MEC_ESPI_MEM_EC_MEM_BAR_Type EC_MEM_BAR[10];/*!< (@ 0x00000130) Memory BAR LDN and memory ad…[all …]
16 …__IM uint16_t LDN_MSK; /*!< (@ 0x00000000) eSPI Memory BAR LDN and address …18 …__IM uint16_t RSVD_H1; /*!< (@ 0x00000002) Bits[31:16] reserved …19 …__IM uint16_t RSVD_H2; /*!< (@ 0x00000004) Bits[47:32] reserved …20 …__IM uint16_t RSVD_H3; /*!< (@ 0x00000006) Bits[63:48] reserved …21 …__IM uint16_t RSVD_H4; /*!< (@ 0x00000008) Bits[79:64] reserved …33 __IM uint16_t RESERVED[2];53 …__IM uint16_t VASZ; /*!< (@ 0x00000000) 16-bit register with valid(enabl…58 __IM uint16_t RESERVED[2];71 __IM uint32_t RESERVED[76];72 …__IM MEC_ESPI_MEM_EC_MEM_BAR_Type EC_MEM_BAR[10];/*!< (@ 0x00000130) Memory BAR LDN and memory ad…[all …]
18 __IM uint32_t RESERVED;20 __IM uint8_t RESERVED1;21 __IM uint16_t RESERVED2;22 __IM uint32_t RESERVED3[65];25 __IM uint32_t RESERVED4[5];26 …__IM uint32_t SMON; /*!< (@ 0x00000128) Glue Signal Monitor State …
20 __IM uint8_t RESERVED[3];22 __IM uint8_t RESERVED1[251];24 __IM uint8_t RESERVED2[3];26 __IM uint8_t RESERVED3[3];28 __IM uint8_t RESERVED4[3];30 __IM uint8_t RESERVED5[7];32 __IM uint8_t RESERVED6[539];
20 …__IM uint8_t STATUS; /*!< (@ 0x00000000) I2C mode Status(RO) …22 __IM uint8_t RESERVED;23 __IM uint16_t RESERVED1;26 __IM uint8_t RESERVED2;27 __IM uint16_t RESERVED3;31 __IM uint8_t RESERVED4;32 __IM uint16_t RESERVED5;42 __IM uint8_t RESERVED6;43 __IM uint16_t RESERVED7;48 __IM uint8_t RESERVED8;[all …]
20 __IM uint16_t RESERVED;21 __IM uint32_t RESERVED1[63];22 …__IM uint32_t PCLC[3]; /*!< (@ 0x00000100) eSPI IO PC Last cycle 96-bit reg…23 …__IM uint32_t PCERR[2]; /*!< (@ 0x0000010C) eSPI IO PC Error address 64-bit …26 __IM uint32_t RESERVED2;32 …__IM uint32_t EC_LDN_MSK[25]; /*!< (@ 0x00000134) I/O BAR logical device number an…34 __IM uint32_t RESERVED3[34];40 __IM uint32_t RESERVED4[4];43 __IM uint32_t RESERVED5;46 __IM uint32_t RESERVED6;[all …]
26 __IM uint8_t RESERVED;27 __IM uint16_t RESERVED1;29 __IM uint8_t RESERVED2;30 __IM uint16_t RESERVED3;31 __IM uint32_t RESERVED4[59];34 __IM uint16_t RESERVED5;45 __IM uint32_t RESERVED6[2];
26 __IM uint32_t RESERVED;29 __IM uint32_t RESERVED1[2];32 __IM uint32_t RESERVED2[3];35 __IM uint32_t RESERVED3[3];41 __IM uint32_t RESERVED4[12];42 …__IM uint32_t CNT32K; /*!< (@ 0x000000C0) PCR 32KHz period counter registe…43 …__IM uint32_t CNT32KPH; /*!< (@ 0x000000C4) PCR 32KHz pulse high counter reg…46 …__IM uint32_t DCVC; /*!< (@ 0x000000D0) PCR 32KHz duty cycle variation c…48 …__IM uint32_t VCNT32K; /*!< (@ 0x000000D8) PCR 32KHz valid count register …53 __IM uint32_t RESERVED5;
18 …__IM uint8_t HP92D; /*!< (@ 0x00000000) Port92 Host accessible register …19 __IM uint8_t RESERVED[255];21 __IM uint8_t RESERVED1[7];23 __IM uint8_t RESERVED2[3];25 __IM uint8_t RESERVED3[547];
18 __IM uint32_t RESERVED;20 __IM uint32_t RESERVED1[2];28 __IM uint32_t RESERVED2[5];30 __IM uint32_t RESERVED3[3];35 __IM uint32_t RESERVED4[2];44 __IM uint32_t RESERVED5[2];48 __IM uint32_t RESERVED6[5];52 …__IM uint32_t EMBRST_CNT; /*!< (@ 0x000000BC) Embedded Reset Count …53 __IM uint32_t RESERVED7[12];55 __IM uint32_t RESERVED8[20];[all …]
18 __IM uint8_t RESERVED[4];20 __IM uint8_t RESERVED1[3];21 …__IM uint8_t KSI_IN; /*!< (@ 0x00000008) Key scan input pin state …22 __IM uint8_t RESERVED2[3];24 __IM uint8_t RESERVED3[3];26 __IM uint8_t RESERVED4[3];
26 __IM uint32_t RESERVED[4];29 __IM uint32_t RESERVED1[3];32 __IM uint32_t RESERVED2[3];38 __IM uint32_t RESERVED3[12];39 …__IM uint32_t CNT32K; /*!< (@ 0x000000C0) PCR 32KHz period counter registe…40 …__IM uint32_t CNT32KPH; /*!< (@ 0x000000C4) PCR 32KHz pulse high counter reg…43 …__IM uint32_t DCVC; /*!< (@ 0x000000D0) PCR 32KHz duty cycle variation c…45 …__IM uint32_t VCNT32K; /*!< (@ 0x000000D8) PCR 32KHz valid count register …
30 …__IM uint8_t REGC; /*!< (@ 0x0000000C) RTC register C …32 __IM uint16_t RESERVED;34 __IM uint8_t RESERVED1;35 __IM uint16_t RESERVED2;37 __IM uint8_t RESERVED3;38 __IM uint16_t RESERVED4;
19 __IM uint32_t RESERVED;21 __IM uint32_t RESERVED1[2];23 __IM uint32_t RESERVED2;25 …__IM uint32_t MCNTL; /*!< (@ 0x00000020) VBAT Monotonic counter bits[31:0…28 __IM uint32_t RESERVED3[2];
