Searched refs:USB (Results 1 – 9 of 9) sorted by relevance
43 USB->SOFT_RST = SOFT_RESET_REG_MASK; in MSS_USB_CIF_soft_reset()45 soft_reset = USB->SOFT_RST; in MSS_USB_CIF_soft_reset()58 USB->POWER |= POWER_REG_ENABLE_HS_MASK; in MSS_USB_CIF_enable_hs_mode()67 USB->POWER &= ~POWER_REG_ENABLE_HS_MASK; in MSS_USB_CIF_disable_hs_mode()79 return (USB->USB_IRQ); in MSS_USB_CIF_read_irq_reg()92 return (USB->TX_IRQ); in MSS_USB_CIF_read_tx_ep_irq_reg()101 return (USB->RX_IRQ); in MSS_USB_CIF_read_rx_ep_irq_reg()110 USB->USB_IRQ = 0u; in MSS_USB_CIF_clr_usb_irq_reg()119 USB->TX_IRQ_ENABLE |= (uint16_t)(MSS_USB_WORD_BIT_0_MASK << (uint8_t)ep_num); in MSS_USB_CIF_tx_ep_enable_irq()129 USB->TX_IRQ_ENABLE &= (uint16_t)(~(MSS_USB_WORD_BIT_0_MASK << (uint8_t)ep_num)); in MSS_USB_CIF_tx_ep_disable_irq()[all …]
38 return (((USB->ENDPOINT[MSS_USB_CEP].TX_CSR & CSR0L_HOST_STALL_RCVD_MASK) ? in MSS_USBH_CIF_cep_is_rxstall_err()48 USB->ENDPOINT[MSS_USB_CEP].TX_CSR &= ~CSR0L_HOST_STALL_RCVD_MASK; in MSS_USBH_CIF_cep_clr_rxstall_err()57 return (((USB->ENDPOINT[MSS_USB_CEP].TX_CSR & CSR0L_HOST_RETRY_ERR_MASK) ? in MSS_USBH_CIF_cep_is_retry_err()67 USB->ENDPOINT[MSS_USB_CEP].TX_CSR &= ~CSR0L_HOST_RETRY_ERR_MASK; in MSS_USBH_CIF_cep_clr_retry_err()76 USB->ENDPOINT[MSS_USB_CEP].TX_CSR = 0x0000u; in MSS_USBH_CIF_cep_clr_csr_reg()85 return (((USB->ENDPOINT[MSS_USB_CEP].TX_CSR & CSR0L_HOST_NAK_TIMEOUT_MASK) ? in MSS_USBH_CIF_cep_is_naktimeout_err()95 USB->ENDPOINT[MSS_USB_CEP].TX_CSR &= ~CSR0L_HOST_NAK_TIMEOUT_MASK; in MSS_USBH_CIF_cep_clr_naktimeout_err()108 if ((USB->ENDPOINT[ep_num].TX_CSR) & (TxCSRL_HOST_EPN_TX_PKT_RDY_MASK | in MSS_USBH_CIF_cep_flush_fifo()111 USB->ENDPOINT[MSS_USB_CEP].TX_CSR |= CSR0H_HOST_FLUSH_FIFO_MASK; in MSS_USBH_CIF_cep_flush_fifo()121 return (((USB->ENDPOINT[MSS_USB_CEP].TX_CSR & CSR0H_HOST_DATA_TOG_MASK) ? in MSS_USBH_CIF_cep_is_data_tog()[all …]
331 USB->POWER |= POWER_REG_BUS_RESET_SIGNAL_MASK; in MSS_USBH_CIF_assert_bus_reset()336 USB->POWER &= ~POWER_REG_BUS_RESET_SIGNAL_MASK; in MSS_USBH_CIF_clr_bus_reset()341 USB->POWER |= POWER_REG_RESUME_SIGNAL_MASK; in MSS_USBH_CIF_assert_bus_resume()347 USB->POWER &= ~POWER_REG_RESUME_SIGNAL_MASK; in MSS_USBH_CIF_clr_bus_resume()352 USB->POWER |= POWER_REG_ENABLE_SUSPENDM_MASK; in MSS_USBH_CIF_enable_suspendm_out()357 USB->POWER &= ~POWER_REG_ENABLE_SUSPENDM_MASK; in MSS_USBH_CIF_disable_suspendm_out()362 USB->POWER |= POWER_REG_SUSPEND_MODE_MASK; in MSS_USBH_CIF_assert_suspend_bus()367 USB->POWER &= ~POWER_REG_SUSPEND_MODE_MASK; in MSS_USBH_CIF_clr_suspend_bus()372 return (((USB->POWER & POWER_REG_SUSPEND_MODE_MASK) ? MSS_USB_BOOLEAN_TRUE in MSS_USBH_CIF_is_host_suspended()378 USB->DEV_CTRL &= ~DEV_CTRL_SESSION_MASK; in MSS_USBH_CIF_end_session()[all …]
43 USB->FADDR = addr; in MSS_USBD_CIF_set_dev_addr()48 return(USB->FADDR); in MSS_USBD_CIF_get_dev_addr()59 USB->POWER |= POWER_REG_ISO_UPDATE_MASK; in MSS_USBD_CIF_set_isoupdate()65 USB->POWER &= ~POWER_REG_ISO_UPDATE_MASK; in MSS_USBD_CIF_clr_isoupdate()105 USB->POWER |= POWER_REG_SOFT_CONN_MASK; in MSS_USBD_CIF_dev_connect()110 USB->POWER &= ~POWER_REG_SOFT_CONN_MASK; in MSS_USBD_CIF_dev_disconnect()120 return(((USB->POWER & POWER_REG_HS_MODE_MASK) ? in MSS_USBD_CIF_is_hs_mode()126 USB->INDEXED_CSR.DEVICE_EP0.CSR0 = (CSR0L_DEV_SERVICED_RX_PKT_RDY_MASK | in MSS_USBD_CIF_cep_end_zdr()133 USB->INDEXED_CSR.DEVICE_EP0.CSR0 = CSR0L_DEV_SERVICED_RX_PKT_RDY_MASK; in MSS_USBD_CIF_cep_clr_rxpktrdy()138 USB->INDEXED_CSR.DEVICE_EP0.CSR0 = (CSR0L_DEV_SEND_STALL_MASK | in MSS_USBD_CIF_cep_stall()[all …]
356 USB->INDEXED_CSR.DEVICE_EP0.CSR0 |= CSR0H_DEV_FLUSH_FIFO_MASK; in MSS_USB_CIF_cep_flush_fifo()363 USB->ENDPOINT[ep_num].TX_CSR |= TxCSRL_REG_EPN_FLUSH_FIFO_MASK; in MSS_USB_CIF_tx_ep_flush_fifo()370 USB->ENDPOINT[ep_num].RX_CSR |= RxCSRL_REG_EPN_FLUSH_FIFO_MASK; in MSS_USB_CIF_rx_ep_flush_fifo()377 return(((USB->ENDPOINT[ep_num].RX_CSR & RxCSRL_REG_EPN_RX_FIFO_FULL_MASK) ? in MSS_USB_CIF_rx_ep_is_fifo_full()386 USB->USB_ENABLE |= (irq_mask); in MSS_USB_CIF_enable_usbirq()394 USB->USB_ENABLE &= ~(irq_mask); in MSS_USB_CIF_disable_usbirq()402 return(((USB->ENDPOINT[ep_num].TX_CSR & TxCSRL_REG_EPN_TX_FIFO_NE_MASK) in MSS_USB_CIF_is_txepfifo_notempty()414 USB->TX_IRQ_ENABLE |= (uint16_t)(TX_IRQ_ENABLE_REG_CEP_MASK); in MSS_USB_CIF_cep_enable_irq()425 USB->TX_IRQ_ENABLE &= (uint16_t)(~TX_IRQ_ENABLE_REG_CEP_MASK); in MSS_USB_CIF_cep_disable_irq()437 USB->INDEX = index; in MSS_USB_CIF_set_index_reg()[all …]
69 USB->C_T_HSBT = 0x01u; in MSS_USBD_CIF_init()82 hw_core->core_max_nbr_of_tx_ep = (USB->EP_INFO & 0x0Fu); /*lower nibble for txep*/ in MSS_USBD_CIF_get_hwcore_info()83 hw_core->core_max_nbr_of_rx_ep = ((USB->EP_INFO & 0xF0u) >> 4u);/*higher nibble for txep*/ in MSS_USBD_CIF_get_hwcore_info()84 hw_core->core_ram_bus_width = (USB->RAM_INFO & 0x0Fu);/*lower nibble for bus width*/ in MSS_USBD_CIF_get_hwcore_info()85 …hw_core->core_max_nbr_of_dma_chan = ((USB->RAM_INFO & 0xF0u) >> 4u);/*higher nibble for dma channe… in MSS_USBD_CIF_get_hwcore_info()86 hw_core->core_WTCON = ((USB->LINK_INFO & 0xF0u) >> 4u);/*refer musb section 3 . 7 . 3*/ in MSS_USBD_CIF_get_hwcore_info()87 hw_core->core_WTID = (USB->LINK_INFO & 0x0Fu);/*refer musb section 3 . 7 . 3*/ in MSS_USBD_CIF_get_hwcore_info()88 hw_core->core_VPLEN = USB->VP_LEN; in MSS_USBD_CIF_get_hwcore_info()89 hw_core->core_HS_EOF1 = USB->HS_EOF1; in MSS_USBD_CIF_get_hwcore_info()90 hw_core->core_FS_EOF1 = USB->FS_EOF1; in MSS_USBD_CIF_get_hwcore_info()[all …]
39 return(((USB->POWER & POWER_REG_SUSPEND_MODE_MASK) ? in MSS_USBD_CIF_is_suspend_mode()50 USB->POWER |= POWER_REG_RESUME_SIGNAL_MASK; in MSS_USBD_CIF_resume_gen()63 return (((USB->DEV_CTRL & DEV_CTRL_SESSION_MASK) ? in MSS_USB_OTG_is_session_on()77 USB->DEV_CTRL |= DEV_CTRL_SESSION_MASK; in MSS_USB_OTG_initiate_srp()87 USB->DEV_CTRL |= DEV_CTRL_HOST_REQ_MASK; in MSS_USB_OTG_initiate_hnp()
52 USB->C_T_HSBT = 0x01u; in MSS_USBH_CIF_init()394 USB->ENDPOINT[MSS_USB_CEP].TX_CSR &= ~ (CSR0L_HOST_IN_PKT_REQ_MASK | in MSS_USBH_CIF_cep_abort_xfr()
524 #define USB ((MSS_USB_TypeDef *) USB_BASE) macro
