Searched refs:TX_CSR (Results 1 – 6 of 6) sorted by relevance
38 return (((USB->ENDPOINT[MSS_USB_CEP].TX_CSR & CSR0L_HOST_STALL_RCVD_MASK) ? in MSS_USBH_CIF_cep_is_rxstall_err()48 USB->ENDPOINT[MSS_USB_CEP].TX_CSR &= ~CSR0L_HOST_STALL_RCVD_MASK; in MSS_USBH_CIF_cep_clr_rxstall_err()57 return (((USB->ENDPOINT[MSS_USB_CEP].TX_CSR & CSR0L_HOST_RETRY_ERR_MASK) ? in MSS_USBH_CIF_cep_is_retry_err()67 USB->ENDPOINT[MSS_USB_CEP].TX_CSR &= ~CSR0L_HOST_RETRY_ERR_MASK; in MSS_USBH_CIF_cep_clr_retry_err()76 USB->ENDPOINT[MSS_USB_CEP].TX_CSR = 0x0000u; in MSS_USBH_CIF_cep_clr_csr_reg()85 return (((USB->ENDPOINT[MSS_USB_CEP].TX_CSR & CSR0L_HOST_NAK_TIMEOUT_MASK) ? in MSS_USBH_CIF_cep_is_naktimeout_err()95 USB->ENDPOINT[MSS_USB_CEP].TX_CSR &= ~CSR0L_HOST_NAK_TIMEOUT_MASK; in MSS_USBH_CIF_cep_clr_naktimeout_err()108 if ((USB->ENDPOINT[ep_num].TX_CSR) & (TxCSRL_HOST_EPN_TX_PKT_RDY_MASK | in MSS_USBH_CIF_cep_flush_fifo()111 USB->ENDPOINT[MSS_USB_CEP].TX_CSR |= CSR0H_HOST_FLUSH_FIFO_MASK; in MSS_USBH_CIF_cep_flush_fifo()121 return (((USB->ENDPOINT[MSS_USB_CEP].TX_CSR & CSR0H_HOST_DATA_TOG_MASK) ? in MSS_USBH_CIF_cep_is_data_tog()[all …]
407 USB->ENDPOINT[MSS_USB_CEP].TX_CSR &= ~CSR0L_HOST_RX_PKT_RDY_MASK; in MSS_USBH_CIF_cep_clr_rxpktrdy()413 USB->ENDPOINT[MSS_USB_CEP].TX_CSR |= CSR0L_HOST_IN_PKT_REQ_MASK; in MSS_USBH_CIF_cep_set_request_in_pkt()418 USB->ENDPOINT[MSS_USB_CEP].TX_CSR |= (CSR0L_HOST_SETUP_PKT_MASK); in MSS_USBH_CIF_cep_set_setuppktonly()422 USB->ENDPOINT[MSS_USB_CEP].TX_CSR |= (CSR0L_HOST_SETUP_PKT_MASK | in MSS_USBH_CIF_cep_set_setuppktrdy()428 USB->ENDPOINT[MSS_USB_CEP].TX_CSR |= (CSR0L_HOST_STATUS_PKT_MASK | in MSS_USBH_CIF_cep_set_statuspktrdy_after_out()434 USB->ENDPOINT[MSS_USB_CEP].TX_CSR |= (CSR0L_HOST_STATUS_PKT_MASK | in MSS_USBH_CIF_cep_set_statuspktrdy_after_in()440 if(CSR0L_HOST_RX_PKT_RDY_MASK | USB->ENDPOINT[MSS_USB_CEP].TX_CSR) in MSS_USBH_CIF_cep_clr_statusRxpktrdy()442 USB->ENDPOINT[MSS_USB_CEP].TX_CSR &= ~(CSR0L_HOST_STATUS_PKT_MASK | in MSS_USBH_CIF_cep_clr_statusRxpktrdy()447 USB->ENDPOINT[MSS_USB_CEP].TX_CSR &= ~(CSR0L_HOST_STATUS_PKT_MASK); in MSS_USBH_CIF_cep_clr_statusRxpktrdy()453 return(USB->ENDPOINT[MSS_USB_CEP].TX_CSR); in MSS_USBH_CIF_cep_read_csr_reg()[all …]
385 USB->ENDPOINT[ep_num].TX_CSR |= TxCSRL_REG_EPN_TX_PKT_RDY_MASK; in MSS_USB_CIF_tx_ep_set_txpktrdy()394 return (((USB->ENDPOINT[ep_num].TX_CSR & TxCSRL_REG_EPN_TX_PKT_RDY_MASK) ? in MSS_USB_CIF_tx_ep_is_txpktrdy()404 USB->ENDPOINT[ep_num].TX_CSR |= TxCSRL_REG_EPN_SEND_STALL_MASK; in MSS_USB_CIF_tx_ep_set_send_stall_bit()413 USB->ENDPOINT[ep_num].TX_CSR &= ~TxCSRL_REG_EPN_SEND_STALL_MASK; in MSS_USB_CIF_tx_ep_clr_send_stall_bit()422 USB->ENDPOINT[ep_num].TX_CSR &= ~TxCSRL_REG_EPN_STALL_SENT_MASK; in MSS_USB_CIF_tx_ep_clr_stall_sent_bit()431 return (uint8_t)(((USB->ENDPOINT[ep_num].TX_CSR & TxCSRL_REG_EPN_STALL_SENT_MASK) ? in MSS_USB_CIF_tx_ep_is_stall_sent_bit()441 USB->ENDPOINT[ep_num].TX_CSR |= TxCSRL_REG_EPN_CLR_DATA_TOG_MASK; in MSS_USB_CIF_tx_ep_clr_data_tog()450 return (((USB->ENDPOINT[ep_num].TX_CSR & TxCSRL_REG_EPN_ISO_INCOMP_TX_MASK) ? in MSS_USB_CIF_tx_ep_is_isoincomp()463 USB->ENDPOINT[ep_num].TX_CSR |= TxCSRH_REG_EPN_DMA_MODE_MASK; in MSS_USB_CIF_tx_ep_set_dma_mode1()472 USB->ENDPOINT[ep_num].TX_CSR &= ~TxCSRH_REG_EPN_DMA_MODE_MASK; in MSS_USB_CIF_tx_ep_set_dma_mode0()[all …]
322 volatile uint16_t TX_CSR; member388 volatile uint16_t TX_CSR; member418 volatile uint16_t TX_CSR; member
363 USB->ENDPOINT[ep_num].TX_CSR |= TxCSRL_REG_EPN_FLUSH_FIFO_MASK; in MSS_USB_CIF_tx_ep_flush_fifo()402 return(((USB->ENDPOINT[ep_num].TX_CSR & TxCSRL_REG_EPN_TX_FIFO_NE_MASK) in MSS_USB_CIF_is_txepfifo_notempty()
394 USB->ENDPOINT[MSS_USB_CEP].TX_CSR &= ~ (CSR0L_HOST_IN_PKT_REQ_MASK | in MSS_USBH_CIF_cep_abort_xfr()
