Searched refs:RX_FIFO_EMPTY_MASK (Results 1 – 1 of 1) sorted by relevance
63 #define RX_FIFO_EMPTY_MASK 0x00000040u macro503 rx_fifo_empty = this_spi->hw_reg->STATUS & RX_FIFO_EMPTY_MASK; in MSS_SPI_transfer_block()507 rx_fifo_empty = this_spi->hw_reg->STATUS & RX_FIFO_EMPTY_MASK; in MSS_SPI_transfer_block()532 rx_fifo_empty = this_spi->hw_reg->STATUS & RX_FIFO_EMPTY_MASK; in MSS_SPI_transfer_block()777 while (0u == (this_spi->hw_reg->STATUS & RX_FIFO_EMPTY_MASK)) in MSS_SPI_set_slave_block_buffers()1048 while (0u == (this_spi->hw_reg->STATUS & RX_FIFO_EMPTY_MASK)) in read_slave_rx_fifo()1062 while (0u == (this_spi->hw_reg->STATUS & RX_FIFO_EMPTY_MASK)) in read_slave_rx_fifo()1076 while (0u == (this_spi->hw_reg->STATUS & RX_FIFO_EMPTY_MASK)) in read_slave_rx_fifo()1102 while (0u == (this_spi->hw_reg->STATUS & RX_FIFO_EMPTY_MASK)) in mss_spi_isr()1115 while (0u == (this_spi->hw_reg->STATUS & RX_FIFO_EMPTY_MASK)) in mss_spi_isr()[all …]
