Searched refs:RX_CSR (Results 1 – 5 of 5) sorted by relevance
422 return (((USB->ENDPOINT[ep_num].RX_CSR & RXCSRL_HOST_EPN_RX_PKT_RDY_MASK) ? in MSS_USBH_CIF_rx_ep_is_rxpktrdy()432 return (((USB->ENDPOINT[ep_num].RX_CSR & RXCSRL_HOST_EPN_RX_FIFO_FULL_MASK) ? in MSS_USBH_CIF_rx_ep_is_fifo_full()442 return (((USB->ENDPOINT[ep_num].RX_CSR & RXCSRL_HOST_EPN_RESPONSE_ERR_MASK) ? in MSS_USBH_CIF_rx_ep_is_retry_err()452 USB->ENDPOINT[ep_num].RX_CSR &= ~RXCSRL_HOST_EPN_RESPONSE_ERR_MASK; in MSS_USBH_CIF_rx_ep_clr_retry_err()461 return (((USB->ENDPOINT[ep_num].RX_CSR & RXCSRL_HOST_EPN_NAK_TIMEOUT_ERR_MASK) ? in MSS_USBH_CIF_rx_ep_is_naktimeout_err()471 USB->ENDPOINT[ep_num].RX_CSR &= ~RXCSRL_HOST_EPN_NAK_TIMEOUT_ERR_MASK; in MSS_USBH_CIF_rx_ep_clr_naktimeout_err()480 USB->ENDPOINT[ep_num].RX_CSR |= RXCSRL_HOST_EPN_FLUSH_FIFO_MASK; in MSS_USBH_CIF_rx_ep_flush_fifo_reg()489 return (((USB->ENDPOINT[ep_num].RX_CSR & RXCSRL_HOST_EPN_STALL_RCVD_MASK) ? in MSS_USBH_CIF_rx_ep_is_rxstall_err()499 USB->ENDPOINT[ep_num].RX_CSR &= ~RXCSRL_HOST_EPN_STALL_RCVD_MASK; in MSS_USBH_CIF_rx_ep_clr_rxstall_err()508 USB->ENDPOINT[ep_num].RX_CSR |= RXCSRL_HOST_EPN_CLR_DATA_TOG_MASK; in MSS_USBH_CIF_rx_ep_clr_data_tog()[all …]
661 return (((USB->ENDPOINT[ep_num].RX_CSR & RxCSRL_REG_EPN_RX_PKT_RDY_MASK) ? in MSS_USB_CIF_rx_ep_is_rxpktrdy()671 USB->ENDPOINT[ep_num].RX_CSR &= ~RxCSRL_REG_EPN_RX_PKT_RDY_MASK; in MSS_USB_CIF_rx_ep_clr_rxpktrdy()680 return (((USB->ENDPOINT[ep_num].RX_CSR & RxCSRL_REG_EPN_OVERRUN_MASK) ? in MSS_USB_CIF_rx_ep_is_overrun()690 uint16_t reg_val = USB->ENDPOINT[ep_num].RX_CSR; in MSS_USB_CIF_rx_ep_clr_overrun()694 USB->ENDPOINT[ep_num].RX_CSR = reg_val; in MSS_USB_CIF_rx_ep_clr_overrun()703 return (((USB->ENDPOINT[ep_num].RX_CSR & RxCSRL_REG_EPN_DATA_ERR_MASK) ? in MSS_USB_CIF_rx_ep_is_dataerr()713 USB->ENDPOINT[ep_num].RX_CSR |= (RxCSRL_REG_EPN_SEND_STALL_MASK | in MSS_USB_CIF_rx_ep_set_send_stall_bit()723 uint16_t reg_val = USB->ENDPOINT[ep_num].RX_CSR; in MSS_USB_CIF_rx_ep_clr_send_stall_bit()727 USB->ENDPOINT[ep_num].RX_CSR = reg_val; in MSS_USB_CIF_rx_ep_clr_send_stall_bit()736 return (((USB->ENDPOINT[ep_num].RX_CSR & RxCSRL_REG_EPN_STALL_SENT_MASK) ? in MSS_USB_CIF_rx_ep_is_stall_sent_bit()[all …]
324 volatile uint16_t RX_CSR; member375 volatile uint16_t RX_CSR; member390 volatile uint16_t RX_CSR; member405 volatile uint16_t RX_CSR; member420 volatile uint16_t RX_CSR; member
591 USB->ENDPOINT[ep_num].RX_CSR |= RXCSRL_HOST_EPN_IN_PKT_REQ_MASK; in MSS_USBH_CIF_rx_ep_set_reqpkt()600 USB->ENDPOINT[ep_num].RX_CSR &= ~RXCSRL_HOST_EPN_IN_PKT_REQ_MASK; in MSS_USBH_CIF_rx_ep_clr_reqpkt()609 …return((USB->ENDPOINT[ep_num].RX_CSR &RXCSRL_HOST_EPN_IN_PKT_REQ_MASK)? MSS_USB_BOOLEAN_TRUE : MSS… in MSS_USBH_CIF_rx_ep_is_reqpkt()
370 USB->ENDPOINT[ep_num].RX_CSR |= RxCSRL_REG_EPN_FLUSH_FIFO_MASK; in MSS_USB_CIF_rx_ep_flush_fifo()377 return(((USB->ENDPOINT[ep_num].RX_CSR & RxCSRL_REG_EPN_RX_FIFO_FULL_MASK) ? in MSS_USB_CIF_rx_ep_is_fifo_full()
