Searched refs:REG_DMAC_CHINTENSET5 (Results 1 – 1 of 1) sorted by relevance
72 #define REG_DMAC_CHINTENSET5 (0x4100A09D) /**< \brief (DMAC) Channel 5 Interrupt Enable Set */ macro344 #define REG_DMAC_CHINTENSET5 (*(RwReg8 *)0x4100A09DUL) /**< \brief (DMAC) Channel 5 Interrupt… macro
