Searched refs:REG_DMAC_CHINTENSET27 (Results 1 – 1 of 1) sorted by relevance
248 #define REG_DMAC_CHINTENSET27 (0x4100A1FD) /**< \brief (DMAC) Channel 27 Interrupt Enable Set … macro520 #define REG_DMAC_CHINTENSET27 (*(RwReg8 *)0x4100A1FDUL) /**< \brief (DMAC) Channel 27 Interrup… macro
