Searched refs:REG_DMAC_CHINTENSET26 (Results 1 – 1 of 1) sorted by relevance
240 #define REG_DMAC_CHINTENSET26 (0x4100A1ED) /**< \brief (DMAC) Channel 26 Interrupt Enable Set … macro512 #define REG_DMAC_CHINTENSET26 (*(RwReg8 *)0x4100A1EDUL) /**< \brief (DMAC) Channel 26 Interrup… macro
