Searched refs:REG_DMAC_CHINTENSET25 (Results 1 – 1 of 1) sorted by relevance
232 #define REG_DMAC_CHINTENSET25 (0x4100A1DD) /**< \brief (DMAC) Channel 25 Interrupt Enable Set … macro504 #define REG_DMAC_CHINTENSET25 (*(RwReg8 *)0x4100A1DDUL) /**< \brief (DMAC) Channel 25 Interrup… macro
