Searched refs:REG_DMAC_CHINTENSET2 (Results 1 – 1 of 1) sorted by relevance
48 #define REG_DMAC_CHINTENSET2 (0x4100A06D) /**< \brief (DMAC) Channel 2 Interrupt Enable Set */ macro320 #define REG_DMAC_CHINTENSET2 (*(RwReg8 *)0x4100A06DUL) /**< \brief (DMAC) Channel 2 Interrupt… macro