Searched refs:REG_DMAC_CHINTENSET10 (Results 1 – 1 of 1) sorted by relevance
112 #define REG_DMAC_CHINTENSET10 (0x4100A0ED) /**< \brief (DMAC) Channel 10 Interrupt Enable Set … macro384 #define REG_DMAC_CHINTENSET10 (*(RwReg8 *)0x4100A0EDUL) /**< \brief (DMAC) Channel 10 Interrup… macro
