Searched refs:REG_DMAC_CHINTENSET1 (Results 1 – 1 of 1) sorted by relevance
40 #define REG_DMAC_CHINTENSET1 (0x4100A05D) /**< \brief (DMAC) Channel 1 Interrupt Enable Set */ macro312 #define REG_DMAC_CHINTENSET1 (*(RwReg8 *)0x4100A05DUL) /**< \brief (DMAC) Channel 1 Interrupt… macro
