Searched refs:REG_DMAC_CHINTENSET0 (Results 1 – 1 of 1) sorted by relevance
32 #define REG_DMAC_CHINTENSET0 (0x4100A04D) /**< \brief (DMAC) Channel 0 Interrupt Enable Set */ macro304 #define REG_DMAC_CHINTENSET0 (*(RwReg8 *)0x4100A04DUL) /**< \brief (DMAC) Channel 0 Interrupt… macro
