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Searched refs:REG_ADC0_INTENSET (Results 1 – 1 of 1) sorted by relevance

/hal_microchip-latest/pic32c/pic32cxsg/include/fixups/instance/
Dadc0_instance_fixup_pic32cxsg.h26 #define REG_ADC0_INTENSET (0x43001C2D) /**< \brief (ADC0) Interrupt Enable Set */ macro
51 #define REG_ADC0_INTENSET (*(RwReg8 *)0x43001C2DUL) /**< \brief (ADC0) Interrupt Enable Se… macro