Searched refs:REG_ADC0_DSEQSTAT (Results 1 – 1 of 1) sorted by relevance
32 #define REG_ADC0_DSEQSTAT (0x43001C3C) /**< \brief (ADC0) DMA Sequencial Status */ macro57 #define REG_ADC0_DSEQSTAT (*(RoReg *)0x43001C3CUL) /**< \brief (ADC0) DMA Sequencial Stat… macro
