Searched refs:REG_ADC0_DSEQCTRL (Results 1 – 1 of 1) sorted by relevance
31 #define REG_ADC0_DSEQCTRL (0x43001C38) /**< \brief (ADC0) DMA Sequential Control */ macro56 #define REG_ADC0_DSEQCTRL (*(RwReg *)0x43001C38UL) /**< \brief (ADC0) DMA Sequential Cont… macro
