Searched refs:PLL_CTRL (Results 1 – 3 of 3) sorted by relevance
431 … MSS_SCB_MSS_PLL->PLL_CTRL = LIBERO_SETTING_MSS_PLL_CTRL & ~(PLL_CTRL_REG_POWERDOWN_B_MASK); in mss_pll_config()465 MSS_SCB_MSS_PLL->PLL_CTRL = (LIBERO_SETTING_MSS_PLL_CTRL) | 0x01U; in mss_pll_config()472 while((MSS_SCB_MSS_PLL->PLL_CTRL & PLL_CTRL_LOCK_BIT) == 0U) in mss_pll_config()514 …MSS_SCB_DDR_PLL->PLL_CTRL = LIBERO_SETTING_DDR_PLL_CTRL & ~(PLL_CTRL_REG_POWERDOWN_B_MASK); in ddr_pll_config()545 MSS_SCB_DDR_PLL->PLL_CTRL = (LIBERO_SETTING_DDR_PLL_CTRL)\ in ddr_pll_config()594 if((MSS_SCB_DDR_PLL->PLL_CTRL & PLL_CTRL_LOCK_BIT) == PLL_CTRL_LOCK_BIT) in ddr_pll_lock_scb()610 MSS_SCB_DDR_PLL->PLL_CTRL &= (uint32_t)~0x00000001UL; in ddr_pll_config_scb_turn_off()634 …MSS_SCB_SGMII_PLL->PLL_CTRL = LIBERO_SETTING_SGMII_PLL_CTRL & ~(PLL_CTRL_REG_POWERDOWN_B_MASK… in sgmii_pll_config_scb()665 MSS_SCB_SGMII_PLL->PLL_CTRL = (LIBERO_SETTING_SGMII_PLL_CTRL)\ in sgmii_pll_config_scb()690 if((MSS_SCB_SGMII_PLL->PLL_CTRL & PLL_CTRL_LOCK_BIT) == PLL_CTRL_LOCK_BIT) in sgmii_pll_lock_scb()
42 __IO uint32_t PLL_CTRL; /*!< Offset: 0x4 */ member
382 while(((MSS_SCB_SGMII_PLL->PLL_CTRL & ((0x01U) << 25U))) == 0U) in MSS_MAC_init()
