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Searched refs:MT_ERROR_MASK_0 (Results 1 – 2 of 2) sorted by relevance

/hal_microchip-latest/mpfs/mpfs_hal/common/nwc/
Dmss_ddr.c4012 DDRCFG->MEM_TEST.MT_ERROR_MASK_0.MT_ERROR_MASK_0 = 0xFFFFFFFFU; in MTC_test()
4020 DDRCFG->MEM_TEST.MT_ERROR_MASK_0.MT_ERROR_MASK_0 &= 0xFFFFFF00U; in MTC_test()
4028 DDRCFG->MEM_TEST.MT_ERROR_MASK_0.MT_ERROR_MASK_0 &= 0xFFFF00FFU; in MTC_test()
4036 DDRCFG->MEM_TEST.MT_ERROR_MASK_0.MT_ERROR_MASK_0 &= 0xFF00FFFFU; in MTC_test()
4044 DDRCFG->MEM_TEST.MT_ERROR_MASK_0.MT_ERROR_MASK_0 &= 0x00FFFFFFU; in MTC_test()
4052 DDRCFG->MEM_TEST.MT_ERROR_MASK_0.MT_ERROR_MASK_0 &= 0xFFFFFFFFU; in MTC_test()
Dmss_ddr_sgmii_regs.h2717 __IO uint32_t MT_ERROR_MASK_0; member
4150 …__IO DDR_CSR_APB_MT_ERROR_MASK_0_TypeDef MT_ERROR_MASK_0; /*!<… member