1 /*
2     Copyright (c) 2013, The Regents of the University of California (Regents).
3     All Rights Reserved.
4 
5     Redistribution and use in source and binary forms, with or without
6     modification, are permitted provided that the following conditions are met:
7     1. Redistributions of source code must retain the above copyright
8        notice, this list of conditions and the following disclaimer.
9     2. Redistributions in binary form must reproduce the above copyright
10        notice, this list of conditions and the following disclaimer in the
11        documentation and/or other materials provided with the distribution.
12     3. Neither the name of the Regents nor the
13        names of its contributors may be used to endorse or promote products
14        derived from this software without specific prior written permission.
15 
16     IN NO EVENT SHALL REGENTS BE LIABLE TO ANY PARTY FOR DIRECT, INDIRECT,
17     SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING LOST PROFITS, ARISING
18     OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF REGENTS HAS
19     BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20 
21     REGENTS SPECIFICALLY DISCLAIMS ANY WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22     THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23     PURPOSE. THE SOFTWARE AND ACCOMPANYING DOCUMENTATION, IF ANY, PROVIDED
24     HEREUNDER IS PROVIDED "AS IS". REGENTS HAS NO OBLIGATION TO PROVIDE
25     MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
26 */
27 
28 /***********************************************************************************
29  * Record of Microchip changes
30  */
31 #ifndef RISCV_MTRAP_H
32 #define RISCV_MTRAP_H
33 
34 #ifdef __cplusplus
35 extern "C" {
36 #endif
37 
38 #ifndef __ASSEMBLER__
39 #define read_const_csr(reg) ({ unsigned long __tmp; \
40   asm ("csrr %0, " #reg : "=r"(__tmp)); \
41   __tmp; })
42 #endif
43 
44 #define IPI_SOFT          0x01
45 #define IPI_FENCE_I       0x02
46 #define IPI_SFENCE_VMA    0x04
47 
48 #define MACHINE_STACK_SIZE  (RISCV_PGSIZE)    /* this is 4k for HLS and 4k for the stack*/
49 #define MENTRY_HLS_OFFSET   (INTEGER_CONTEXT_SIZE + SOFT_FLOAT_CONTEXT_SIZE)
50 #define MENTRY_FRAME_SIZE   (MENTRY_HLS_OFFSET + HLS_SIZE)
51 #define MENTRY_IPI_OFFSET   (MENTRY_HLS_OFFSET)
52 #define MENTRY_IPI_PENDING_OFFSET (MENTRY_HLS_OFFSET + REGBYTES)
53 
54 #ifdef __riscv_flen
55 # define SOFT_FLOAT_CONTEXT_SIZE (0)
56 #else
57 # define SOFT_FLOAT_CONTEXT_SIZE (8 * 32)
58 #endif
59 
60 #define HLS_SIZE          (64)
61 #define INTEGER_CONTEXT_SIZE (32 * REGBYTES)
62 
63 #ifndef __ASSEMBLER__
64 typedef struct {
65   volatile uint32_t *  ipi;
66   volatile int         mipi_pending;
67   volatile int         padding;
68   volatile uint64_t *  timecmp;
69   volatile uint32_t *  plic_m_thresh;
70   volatile uintptr_t * plic_m_ie;
71   volatile uint32_t *  plic_s_thresh;
72   volatile uintptr_t * plic_s_ie;
73 } hls_t;
74 
75 /* This code relies on the stack being allocated on a 4K boundary */
76 /* also can  not be bigger than 4k */
77 #define MACHINE_STACK_TOP() ({ \
78   register uintptr_t sp asm ("sp"); \
79   (void *)((sp + RISCV_PGSIZE) & -RISCV_PGSIZE); })
80 
81 // hart-local storage
82 #define HLS() ((hls_t*)(MACHINE_STACK_TOP() - HLS_SIZE))
83 #define OTHER_HLS(id) ((hls_t*)((void *)HLS() + RISCV_PGSIZE * ((id) - read_const_csr(mhartid))))
84 
85 #endif
86 
87 #ifdef __cplusplus
88 }
89 #endif
90 
91 #endif /*RISCV_MTRAP_H*/
92 
93