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Searched refs:MEC_PCR_SCC_SLOW_CLK_DIV_DFLT (Results 1 – 2 of 2) sorted by relevance

/hal_microchip-latest/mec5/devices/common/
Dmec5_pcr_v2.h185 …MEC_PCR_SCC_SLOW_CLK_DIV_DFLT = 480, /*!< DFLT : Default divider (480) produces 100KHz … enumerator
Dmec5_pcr_v2_1.h180 …MEC_PCR_SCC_SLOW_CLK_DIV_DFLT = 480, /*!< DFLT : Default divider (480) produces 100KHz … enumerator