Searched refs:MEC_PCR_SCC_SLOW_CLK_DIV_DFLT (Results 1 – 2 of 2) sorted by relevance
185 …MEC_PCR_SCC_SLOW_CLK_DIV_DFLT = 480, /*!< DFLT : Default divider (480) produces 100KHz … enumerator
180 …MEC_PCR_SCC_SLOW_CLK_DIV_DFLT = 480, /*!< DFLT : Default divider (480) produces 100KHz … enumerator