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Searched refs:MEC_DIV_ROUND_UP (Results 1 – 3 of 3) sorted by relevance

/hal_microchip-latest/mec5/drivers/
Dmec_i3c_pvt.c520 high_count = (uint16_t)MEC_DIV_ROUND_UP(I2C_FM_SCL_MIN_HIGH_PERIOD_NS, core_clk_freq_ns); in _i2c_fm_timing_set()
525 low_count = (uint16_t)MEC_DIV_ROUND_UP(I2C_FM_SCL_MIN_LOW_PERIOD_NS, core_clk_freq_ns); in _i2c_fm_timing_set()
551 bus_free_timing_count = (uint32_t)MEC_DIV_ROUND_UP(TGT_BUS_FREE_DURATION_ns, core_clk_freq_ns); in _i3c_bus_free_timing_set()
569 bus_avail_timing_count = (uint32_t)MEC_DIV_ROUND_UP(TGT_BUS_AVAIL_COND_ns, core_clk_freq_ns); in _i3c_bus_available_timing_set()
587 idle_count = (uint32_t)MEC_DIV_ROUND_UP(TGT_BUS_IDLE_COND_ns, core_clk_freq_ns); in _i3c_bus_idle_timing_set()
683 high_count = (uint32_t)MEC_DIV_ROUND_UP(I2C_FMP_SCL_MIN_HIGH_PERIOD_NS, core_clk_freq_ns); in _i2c_fmp_timing_set()
688 low_count = (uint32_t)MEC_DIV_ROUND_UP(I2C_FMP_SCL_MIN_LOW_PERIOD_NS, core_clk_freq_ns); in _i2c_fmp_timing_set()
710 base_count = (uint32_t)MEC_DIV_ROUND_UP(I3C_PUSH_PULL_SCL_MIN_HIGH_PERIOD_NS, core_clk_freq_ns); in _i3c_push_pull_timing_set()
716 high_count = (uint32_t)MEC_DIV_ROUND_UP(base_count * i3c_freq_ns, I3C_SCL_12_5MHZ_PERIOD_NS); in _i3c_push_pull_timing_set()
736 sdr_ext_lcount = MEC_DIV_ROUND_UP(I3C_BUS_SDR4_SCL_PERIOD_NS, core_clk_freq_ns) - high_count; in _i3c_push_pull_timing_set()
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Dmec_defs.h127 #ifndef MEC_DIV_ROUND_UP
128 #define MEC_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) macro
Dmec_i3c.c70 core_clk_freq_ns = MEC_DIV_ROUND_UP(1000000000, core_clk_rate_mhz); in MEC_HAL_I3C_Controller_Clk_I2C_Init()
116 core_clk_freq_ns = MEC_DIV_ROUND_UP(1000000000, core_clk_rate_mhz); in MEC_HAL_I3C_Controller_Clk_Cfg()
118 i3c_freq_ns = MEC_DIV_ROUND_UP(1000000000, i3c_freq); in MEC_HAL_I3C_Controller_Clk_Cfg()
150 core_clk_freq_ns = MEC_DIV_ROUND_UP(1000000000, core_clk_rate_mhz); in MEC_HAL_I3C_Target_Init()