1 /* 2 * Copyright 2024 Microchip Technology Inc. and its subsidiaries. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 #ifndef _MEC_WDT_API_H 7 #define _MEC_WDT_API_H 8 9 #include <stdbool.h> 10 #include <stddef.h> 11 #include <stdint.h> 12 13 #include "mec_retval.h" 14 15 /* Interfaces to any C modules */ 16 #ifdef __cplusplus 17 extern "C" 18 { 19 #endif 20 21 /* Fire an interrupt before SoC reset */ 22 #define MEC5_WDT_INIT_ENABLE 0x01u 23 #define MEC5_WDT_INIT_STALL_HTMR 0x02u 24 #define MEC5_WDT_INIT_STALL_WKTMR 0x04u 25 #define MEC5_WDT_INIT_STALL_JTAG 0x08u 26 #define MEC5_WDT_INIT_GEN_INTR 0x10u 27 28 #define MEC5_WDT_STATUS_EVENT_IRQ 0x01u 29 30 /* forward declaration */ 31 struct mec_wdt_regs; 32 33 int mec_hal_wdt_init(struct mec_wdt_regs *regs, uint16_t nmsec, uint32_t flags); 34 35 uint8_t mec_hal_wdt_intr_get_status(struct mec_wdt_regs *regs); 36 void mec_hal_wdt_intr_clear_status(struct mec_wdt_regs *regs); 37 38 void mec_hal_wdt_intr_ctrl(struct mec_wdt_regs *regs, uint8_t enable); 39 40 void mec_hal_wdt_girq_enable(struct mec_wdt_regs *regs, uint8_t enable); 41 42 /* Application WDT ISR calls this helper to restart WDT to reset the SoC 43 * after counts_before_reset number of 32KHz clock ticks. 44 */ 45 void mec_hal_wdt_intr_helper(struct mec_wdt_regs *regs, uint16_t counts_before_reset); 46 47 void mec_hal_wdt_restart(struct mec_wdt_regs *regs); 48 49 void mec_hal_wdt_reload(struct mec_wdt_regs *regs, uint16_t nmsec); 50 51 bool mec_hal_wdt_is_enabled(struct mec_wdt_regs *regs); 52 53 void mec_hal_wdt_enable(struct mec_wdt_regs *regs); 54 void mec_hal_wdt_disable(struct mec_wdt_regs *regs); 55 56 void mec_hal_wdt_debug_stall(struct mec_wdt_regs *regs, uint8_t enable); 57 58 void mec_hal_wdt_kick(struct mec_wdt_regs *regs); 59 60 /* Returns the read-only count (16-bit) register value */ 61 uint32_t mec_hal_wdt_count(struct mec_wdt_regs *regs); 62 63 #ifdef __cplusplus 64 } 65 #endif 66 67 #endif /* #ifndef _MEC_WDT_API_H */ 68