Searched refs:MEC5_QSPI_DCFG1_FLAG_DMA_MSK0 (Results 1 – 2 of 2) sorted by relevance
284 #define MEC5_QSPI_DCFG1_FLAG_DMA_MSK0 0x3u macro291 (((uint32_t)(chan) & MEC5_QSPI_DCFG1_FLAG_DMA_MSK0) << MEC5_QSPI_DCFG1_FLAG_DMA_TX_POS)294 (((uint32_t)(chan) & MEC5_QSPI_DCFG1_FLAG_DMA_MSK0) << MEC5_QSPI_DCFG1_FLAG_DMA_RX_POS)
1152 chanrx = (ldflags >> MEC5_QSPI_DCFG1_FLAG_DMA_RX_POS) & MEC5_QSPI_DCFG1_FLAG_DMA_MSK0; in mec_hal_qspi_ldma_cfg1()1153 chantx = (ldflags >> MEC5_QSPI_DCFG1_FLAG_DMA_TX_POS) & MEC5_QSPI_DCFG1_FLAG_DMA_MSK0; in mec_hal_qspi_ldma_cfg1()1209 & MEC5_QSPI_DCFG1_FLAG_DMA_MSK0) << MEC_QSPI_DESCR_TXDMA_Pos; in mec_hal_qspi_descrs_cfg1()1215 & MEC5_QSPI_DCFG1_FLAG_DMA_MSK0) << MEC_QSPI_DESCR_RXDMA_Pos; in mec_hal_qspi_descrs_cfg1()
