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Searched refs:MEC5_ECIA_FIRST_GIRQ_NOS (Results 1 – 8 of 8) sorted by relevance

/hal_microchip-latest/mec5/drivers/
Dmec_ecia.c267 for (uint32_t n = MEC5_ECIA_FIRST_GIRQ_NOS; n < MEC5_ECIA_LAST_GIRQ_NOS; n++) { in enable_nvic_aggregated()
273 const struct mec_girq_route *pgr = &girq_routing_tbl[n - MEC5_ECIA_FIRST_GIRQ_NOS]; in enable_nvic_aggregated()
317 if ((bpos >= MEC5_ECIA_FIRST_GIRQ_NOS) && (bpos <= MEC5_ECIA_LAST_GIRQ_NOS)) { in enable_girq_direct_bitmap()
319 &girq_routing_tbl[bpos - MEC5_ECIA_FIRST_GIRQ_NOS]; in enable_girq_direct_bitmap()
442 if ((girq_num < MEC5_ECIA_FIRST_GIRQ_NOS) || (girq_num > MEC5_ECIA_LAST_GIRQ_NOS)) { in mec_hal_girq_bm_en()
450 uint32_t gidx = girq_num - MEC5_ECIA_FIRST_GIRQ_NOS; in mec_hal_girq_bm_en()
464 if ((girq_num < MEC5_ECIA_FIRST_GIRQ_NOS) || (girq_num > MEC5_ECIA_LAST_GIRQ_NOS)) { in mec_hal_girq_bm_clr_src()
472 uint32_t gidx = girq_num - MEC5_ECIA_FIRST_GIRQ_NOS; in mec_hal_girq_bm_clr_src()
481 if ((girq_num < MEC5_ECIA_FIRST_GIRQ_NOS) || (girq_num > MEC5_ECIA_LAST_GIRQ_NOS)) { in mec_hal_girq_source_get()
485 uint32_t gidx = girq_num - MEC5_ECIA_FIRST_GIRQ_NOS; in mec_hal_girq_source_get()
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Dmec_ecia_api.h43 #define MEC_ECIA_INFO_GIRQ(info) (MEC5_ECIA_INFO_GIRQZ(info) + MEC5_ECIA_FIRST_GIRQ_NOS)
/hal_microchip-latest/mec5/devices/MECH172X/
Dmech1723nlj_specs.h48 #define MEC5_ECIA_FIRST_GIRQ_NOS 8 macro
Dmech1723nsz_specs.h48 #define MEC5_ECIA_FIRST_GIRQ_NOS 8 macro
/hal_microchip-latest/mec5/devices/MEC174X/
Dmec1743qlj_specs.h48 #define MEC5_ECIA_FIRST_GIRQ_NOS 8 macro
Dmec1743qsz_specs.h48 #define MEC5_ECIA_FIRST_GIRQ_NOS 8 macro
/hal_microchip-latest/mec5/devices/MEC175X/
Dmec1753qlj_specs.h48 #define MEC5_ECIA_FIRST_GIRQ_NOS 8 macro
Dmec1753qsz_specs.h48 #define MEC5_ECIA_FIRST_GIRQ_NOS 8 macro