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Searched refs:LIBERO_SETTING_WAY_MASK_U54_3_DCACHE (Results 1 – 3 of 3) sorted by relevance

/hal_microchip-latest/mpfs/boards/icicle-kit-es/fpga_design_config/memory_map/
Dhw_cache.h320 #if !defined (LIBERO_SETTING_WAY_MASK_U54_3_DCACHE)
328 #define LIBERO_SETTING_WAY_MASK_U54_3_DCACHE 0x0000F0FFUL macro
/hal_microchip-latest/mpfs/mpfs_hal/common/
Dmss_l2_cache.h315 #if !defined (LIBERO_SETTING_WAY_MASK_U54_3_DCACHE)
323 #define LIBERO_SETTING_WAY_MASK_U54_3_DCACHE 0x0000FFFFUL macro
Dmss_l2_cache.c99 ASSERT((LIBERO_SETTING_WAY_MASK_U54_3_DCACHE & scratchpad_ways_mask) == 0UL); in config_l2_cache()
119 CACHE_CTRL->WAY_MASK_U54_3_DCACHE = LIBERO_SETTING_WAY_MASK_U54_3_DCACHE; in config_l2_cache()