Home
last modified time | relevance | path

Searched refs:LIBERO_SETTING_WAY_MASK_AXI4_PORT_2 (Results 1 – 3 of 3) sorted by relevance

/hal_microchip-latest/mpfs/boards/icicle-kit-es/fpga_design_config/memory_map/
Dhw_cache.h118 #if !defined (LIBERO_SETTING_WAY_MASK_AXI4_PORT_2)
125 #define LIBERO_SETTING_WAY_MASK_AXI4_PORT_2 0x0000F0FFUL macro
/hal_microchip-latest/mpfs/mpfs_hal/common/
Dmss_l2_cache.h113 #if !defined (LIBERO_SETTING_WAY_MASK_AXI4_PORT_2)
120 #define LIBERO_SETTING_WAY_MASK_AXI4_PORT_2 0x0000FFFFUL macro
Dmss_l2_cache.c93 ASSERT((LIBERO_SETTING_WAY_MASK_AXI4_PORT_2 & scratchpad_ways_mask) == 0UL); in config_l2_cache()
112 CACHE_CTRL->WAY_MASK_AXI4_SLAVE_PORT_2 = LIBERO_SETTING_WAY_MASK_AXI4_PORT_2; in config_l2_cache()