LIBERO_SETTING_PHY_HALF_CLK_DLY_ENABLE (reference) in projects: hal_microchip-latest

Searched refs:LIBERO_SETTING_PHY_HALF_CLK_DLY_ENABLE (Results 1 – 2 of 2) sorted by relevance

/hal_microchip-latest/mpfs/boards/icicle-kit-es/fpga_design_config/ddr/
D	hw_ddrc.h	`1875 #if !defined (LIBERO_SETTING_PHY_HALF_CLK_DLY_ENABLE) 1877 #define LIBERO_SETTING_PHY_HALF_CLK_DLY_ENABLE 0x00000000UL macro`
/hal_microchip-latest/mpfs/mpfs_hal/common/nwc/
D	mss_ddr.c	`4766 LIBERO_SETTING_PHY_HALF_CLK_DLY_ENABLE; in init_ddrc()`