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Searched refs:LIBERO_SETTING_CFG_CA_PARITY_LATENCY (Results 1 – 2 of 2) sorted by relevance

/hal_microchip-latest/mpfs/boards/icicle-kit-es/fpga_design_config/ddr/
Dhw_ddrc.h290 #if !defined (LIBERO_SETTING_CFG_CA_PARITY_LATENCY)
292 #define LIBERO_SETTING_CFG_CA_PARITY_LATENCY 0x00000000UL macro
/hal_microchip-latest/mpfs/mpfs_hal/common/nwc/
Dmss_ddr.c4209 LIBERO_SETTING_CFG_CA_PARITY_LATENCY; in init_ddrc()