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Searched refs:IOC_REG5 (Results 1 – 3 of 3) sorted by relevance

/hal_microchip-latest/mpfs/mpfs_hal/common/nwc/
Dmss_ddr_debug.c582 (((CFG_DDR_SGMII_PHY->IOC_REG5.IOC_REG5) >> 0) & 0x3F)); in tip_register_status()
584 (((CFG_DDR_SGMII_PHY->IOC_REG5.IOC_REG5) >> 6) & 0xFFF)); in tip_register_status()
586 (((CFG_DDR_SGMII_PHY->IOC_REG5.IOC_REG5) >> 18) & 0x3F)); in tip_register_status()
588 (((CFG_DDR_SGMII_PHY->IOC_REG5.IOC_REG5) >> 24) & 0x3F)); in tip_register_status()
Dmss_scb_nwc_regs.h90 __I uint32_t IOC_REG5; /*!< Offset: 0x18 */ member
Dmss_ddr_sgmii_phy_defs.h840 __I uint32_t IOC_REG5; member
4322 …__I CFG_DDR_SGMII_PHY_IOC_REG5_TypeDef IOC_REG5; /*!< … member