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Searched refs:INIT_MR_WR_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_microchip-latest/mpfs/mpfs_hal/common/nwc/
Dmss_ddr.c3620 DDRCFG->MC_BASE2.INIT_MR_WR_MASK.INIT_MR_WR_MASK = 0U; in mode_register_write()
3798 DDRCFG->MC_BASE2.INIT_MR_WR_MASK.INIT_MR_WR_MASK = (0x01U <<6U) |\ in VREFDQ_calibration_using_mtc()
4465 DDRCFG->MC_BASE2.INIT_MR_WR_MASK.INIT_MR_WR_MASK =\ in init_ddrc()
Dmss_ddr_sgmii_regs.h1902 __IO uint32_t INIT_MR_WR_MASK; member
4049 …__IO DDR_CSR_APB_INIT_MR_WR_MASK_TypeDef INIT_MR_WR_MASK; /*!<… member