1 /* 2 * Copyright (c) 2024 Microchip 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef _MICROCHIP_PIC32CXSG_HMATRIXB_COMPONENT_FIXUP_H_ 8 #define _MICROCHIP_PIC32CXSG_HMATRIXB_COMPONENT_FIXUP_H_ 9 10 /* -------- HMATRIXB_PRAS : (HMATRIXB Offset: 0x00) (R/W 32) Priority A for Slave -------- */ 11 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 12 typedef union { 13 uint32_t reg; /*!< Type used for register access */ 14 } HMATRIXB_PRAS_Type; 15 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 16 17 /* -------- HMATRIXB_PRBS : (HMATRIXB Offset: 0x04) (R/W 32) Priority B for Slave -------- */ 18 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 19 typedef union { 20 uint32_t reg; /*!< Type used for register access */ 21 } HMATRIXB_PRBS_Type; 22 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 23 24 /** \brief HmatrixbPrs hardware registers */ 25 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 26 typedef struct { 27 __IO HMATRIXB_PRAS_Type PRAS; /**< \brief Offset: 0x000 (R/W 32) Priority A for Slave */ 28 __IO HMATRIXB_PRBS_Type PRBS; /**< \brief Offset: 0x004 (R/W 32) Priority B for Slave */ 29 } HmatrixbPrs; 30 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 31 32 33 /** \brief HMATRIXB hardware registers */ 34 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 35 typedef struct { 36 RoReg8 Reserved1[0x80]; 37 HmatrixbPrs Prs[HMATRIXB_PRS_NUMBER]; /**< \brief Offset: 0x080 HmatrixbPrs groups */ 38 } Hmatrixb; 39 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 40 41 #endif /* _MICROCHIP_PIC32CXSG_HMATRIXB_COMPONENT_FIXUP_H_ */ 42
