1 /*******************************************************************************
2  * Copyright 2019-2021 Microchip FPGA Embedded Systems Solutions.
3  *
4  * SPDX-License-Identifier: MIT
5  *
6  * MPFS HAL Embedded Software
7  *
8  */
9 
10 /*******************************************************************************
11  *
12  * @file mss_h2f.h
13  * @author Microchip-FPGA Embedded Systems Solutions
14  * @brief H2F access data structures and functions.
15  *
16  * Definitions and functions associated with host to fabric interrupt controller.
17  *
18  */
19 
20 #ifndef MSS_H2F_H
21 #define MSS_H2F_H
22 
23 #include "mpfs_hal_config/mss_sw_config.h"
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
29 /*
30 H2F line     Group      Ored (no of interrupts ored to one output line)
31 0            GPIO            41
32 1            MMUART,SPI,CAN  9
33 2            I2C             6
34 3            MAC0            6
35 4            MAC1            6
36 5            WATCHDOGS       10
37 6            Maintenance     3
38 7            SCB             1
39 8            G5C-Message     1
40 9            DDRC            1
41 10           G5C-DEVRST      2
42 11           RTC/USOC        4
43 12           TIMER           2
44 13           ENVM, QSPI      2
45 14           USB             2
46 15           MMC/SDIO        2
47 */
48 
49 /*==============================================================================
50  * Host to Fabric interrupt controller
51  *
52  * For an interrupt to activate the PENABLE and appropriate HENABLE and PENABLE bits must be set.
53  *
54  * Note. Since Interrupts 127:94 are not used in the system the enable registers are non-write-able and always read as zeros.
55  *
56  */
57 
58 typedef struct
59 {
60     volatile uint32_t ENABLE;     /* bit o: Enables all the H2FINT outputs, bit 31:16 Enables individual H2F outputs */
61     volatile uint32_t H2FSTATUS;   /* 15:0 Read back of the 16-bit H2F Interrupts before the H2F and global enable */
62     uint32_t filler[2U];        /* fill the gap in the memory map */
63     volatile uint32_t PLSTATUS[4U];   /* Indicates that the PLINT interrupt is active before the PLINT enable
64                                         i.e. direct read of the PLINT inputs [31:0] from PLSTATUS[0]
65                                         direct read of the PLINT inputs [63:32] from PLSTATUS[1]
66                                         etc  */
67     volatile uint32_t PLENABLE[4U];   /* Enables PLINT interrupts PLENABLE[0] 31:0, PLENABLE[1] 63:32, 95:64, 127:96 */
68 } H2F_CONTROLLER_Type;
69 
70 #ifndef H2F_BASE_ADDRESS
71 #if (LIBERO_SETTING_APBBUS_CR & (1U<<23U))
72 #define H2F_BASE_ADDRESS 0x28126000
73 #else
74 #define H2F_BASE_ADDRESS 0x20126000
75 #endif
76 #endif
77 
78 #define H2F_CONTROLLER    ((H2F_CONTROLLER_Type *)H2F_BASE_ADDRESS)
79 
80 void reset_h2f(void);
81 void enable_h2f_int_output(uint32_t source_int);
82 void disable_h2f_int_output(uint32_t source_int);
83 
84 #ifdef __cplusplus
85 }
86 #endif
87 
88 #endif /* MSS_H2F_H */
89