Home
last modified time | relevance | path

Searched refs:CACHE_CTRL (Results 1 – 2 of 2) sorted by relevance

/hal_microchip-latest/mpfs/mpfs_hal/common/
Dmss_l2_cache.c54 CACHE_CTRL->WAY_ENABLE = LIBERO_SETTING_WAY_ENABLE; in config_l2_cache()
109 CACHE_CTRL->WAY_MASK_DMA = LIBERO_SETTING_WAY_MASK_DMA; in config_l2_cache()
110 CACHE_CTRL->WAY_MASK_AXI4_SLAVE_PORT_0 = LIBERO_SETTING_WAY_MASK_AXI4_PORT_0; in config_l2_cache()
111 CACHE_CTRL->WAY_MASK_AXI4_SLAVE_PORT_1 = LIBERO_SETTING_WAY_MASK_AXI4_PORT_1; in config_l2_cache()
112 CACHE_CTRL->WAY_MASK_AXI4_SLAVE_PORT_2 = LIBERO_SETTING_WAY_MASK_AXI4_PORT_2; in config_l2_cache()
113 CACHE_CTRL->WAY_MASK_AXI4_SLAVE_PORT_3 = LIBERO_SETTING_WAY_MASK_AXI4_PORT_3; in config_l2_cache()
114 CACHE_CTRL->WAY_MASK_E51_ICACHE = LIBERO_SETTING_WAY_MASK_E51_ICACHE; in config_l2_cache()
115 CACHE_CTRL->WAY_MASK_U54_1_DCACHE = LIBERO_SETTING_WAY_MASK_U54_1_DCACHE; in config_l2_cache()
116 CACHE_CTRL->WAY_MASK_U54_1_ICACHE = LIBERO_SETTING_WAY_MASK_U54_1_ICACHE; in config_l2_cache()
117 CACHE_CTRL->WAY_MASK_U54_2_DCACHE = LIBERO_SETTING_WAY_MASK_U54_2_DCACHE; in config_l2_cache()
[all …]
Dmss_l2_cache.h523 #define CACHE_CTRL ((volatile CACHE_CTRL_typedef *) CACHE_CTRL_BASE) macro