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Searched refs:BIT (Results 1 – 13 of 13) sorted by relevance

/hal_microchip-latest/mec/mec1501/component/
Decia.h47 #define MCHP_ECIA_AGGR_BITMAP (BIT(8) | BIT(9) | BIT(10) | BIT(11) |\
48 BIT(12) | BIT(24) | BIT(25) | BIT(26))
50 #define MCHP_ECIA_DIRECT_BITMAP (BIT(13) | BIT(14) | BIT(15) | BIT(16) |\
51 BIT(17) | BIT(18) | BIT(19) | BIT(20) | BIT(21) | BIT(23))
272 REG32(MCHP_GIRQ_BLK_ENSET_ADDR) = BIT(n)
275 REG32(MCHP_GIRQ_BLK_ENCLR_ADDR) = BIT(n)
278 ((REG32(MCHP_GIRQ_BLK_ACTIVE_ADDR) & BIT(n)) != 0u)
293 REG32(MCHP_GIRQ_SRC_ADDR(n)) = BIT(pos)
296 REG32(MCHP_GIRQ_ENSET_ADDR(n)) = BIT(pos)
299 REG32(MCHP_GIRQ_ENCLR_ADDR(n)) = BIT(pos)
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Despi_saf.h120 #define MCHP_SAF_GIRQ_ECP_DONE_BIT BIT(9)
121 #define MCHP_SAF_GIRQ_ERROR_BIT BIT(10)
159 #define MCHP_SAF_ECP_START BIT(0)
169 #define MCHP_SAF_ECP_STS_DONE BIT(0)
170 #define MCHP_SAF_ECP_STS_DONE_TST BIT(1)
171 #define MCHP_SAF_ECP_STS_TMOUT BIT(2)
172 #define MCHP_SAF_ECP_STS_OOR BIT(3)
173 #define MCHP_SAF_ECP_STS_AV BIT(4)
174 #define MCHP_SAF_ECP_STS_BND_4K BIT(5)
175 #define MCHP_SAF_ECP_STS_ERSZ BIT(6)
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Dacpi_ec.h70 #define MCHP_ACPI_EC_0_IBF_GIRQ BIT(5)
71 #define MCHP_ACPI_EC_0_OBE_GIRQ BIT(6)
77 #define MCHP_ACPI_EC_1_IBF_GIRQ BIT(7)
78 #define MCHP_ACPI_EC_1_OBE_GIRQ BIT(8)
84 #define MCHP_ACPI_EC_2_IBF_GIRQ BIT(9)
85 #define MCHP_ACPI_EC_2_OBE_GIRQ BIT(10)
91 #define MCHP_ACPI_EC_3_IBF_GIRQ BIT(11)
92 #define MCHP_ACPI_EC_3_OBE_GIRQ BIT(12)
107 #define MCHP_ACPI_EC_STS_OBF BIT(MCHP_ACPI_EC_STS_OBF_POS)
109 #define MCHP_ACPI_EC_STS_IBF BIT(MCHP_ACPI_EC_STS_IBF_POS)
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Despi_io.h91 #define MCHP_ESPI_PC_GIRQ_VAL BIT(0)
92 #define MCHP_ESPI_BM1_GIRQ_VAL BIT(1)
93 #define MCHP_ESPI_BM2_GIRQ_VAL BIT(2)
94 #define MCHP_ESPI_LTR_GIRQ_VAL BIT(3)
95 #define MCHP_ESPI_OOB_UP_GIRQ_VAL BIT(4)
96 #define MCHP_ESPI_OOB_DN_GIRQ_VAL BIT(5)
97 #define MCHP_ESPI_FC_GIRQ_VAL BIT(6)
98 #define MCHP_ESPI_ESPI_RST_GIRQ_VAL BIT(7)
99 #define MCHP_ESPI_VW_EN_GIRQ_VAL BIT(8)
100 #define MCHP_ESPI_SAF_DONE_GIRQ_VAL BIT(9)
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Dvbat.h61 #define MCHP_VBATR_PFRS_SYS_RST BIT(2)
62 #define MCHP_VBATR_PFRS_JTAG BIT(3)
63 #define MCHP_VBATR_PFRS_RESETI BIT(4)
64 #define MCHP_VBATR_PFRS_WDT BIT(5)
65 #define MCHP_VBATR_PFRS_SYSRESETREQ BIT(6)
66 #define MCHP_VBATR_PFRS_VBAT_RST BIT(7)
78 #define MCHP_VBATR_CLKEN_32K_DOM_32K_IN_PIN BIT(1u << 1)
80 #define MCHP_VBATR_CLKEN_32K_ALWYS_ON_XTAL BIT(2)
82 #define MCHP_VBATR_CLKEN_XTAL2_SE_32K BIT(3)
164 #define MCHP_VCI_OVRD_GIRQ_VAL BIT(MCHP_VCI_OVRD_GIRQ_POS)
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Dqmspi.h53 #define MCHP_QMSPI_GIRQ_VAL BIT(MCHP_QMSPI_GIRQ_POS)
122 #define MCHP_QMSPI_M_ACTIVATE BIT(0)
123 #define MCHP_QMSPI_M_SRST BIT(1)
124 #define MCHP_QMSPI_M_SAF_DMA_MODE_EN BIT(2)
127 #define MCHP_QMSPI_M_CPOL_CLK_IDLE_HI BIT(8)
133 #define MCHP_QMSPI_M_CPHA_MOSI_CE2 BIT(9)
139 #define MCHP_QMSPI_M_CPHA_MISO_CE2 BIT(10)
240 #define MCHP_QMSPI_IFC_WP_OUT_HI BIT(0)
241 #define MCHP_QMSPI_IFC_WP_OUT_EN BIT(1)
242 #define MCHP_QMSPI_IFC_HOLD_OUT_HI BIT(2)
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Ddma.h62 #define MCHP_DMA_PCR_SCR_VAL BIT(6)
81 #define MCHP_DMA_GIRQ_VAL(ch) BIT(ch)
133 #define MCHP_DMA0_GIRQ_VAL BIT(0)
134 #define MCHP_DMA1_GIRQ_VAL BIT(1)
135 #define MCHP_DMA2_GIRQ_VAL BIT(2)
136 #define MCHP_DMA3_GIRQ_VAL BIT(3)
137 #define MCHP_DMA4_GIRQ_VAL BIT(4)
138 #define MCHP_DMA5_GIRQ_VAL BIT(5)
139 #define MCHP_DMA6_GIRQ_VAL BIT(6)
140 #define MCHP_DMA7_GIRQ_VAL BIT(7)
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Decs.h53 #define MCHP_ECS_AHB_ERR_CTRL_DIS BIT(MCHP_ECS_AHB_ERR_CTRL_DIS_POS)
58 #define MCHP_ECS_ICTRL_DIRECT_EN BIT(MCHP_ECS_ICTRL_DIRECT_POS)
63 #define MCHP_ECS_ETM_CTRL_EN BIT(MCHP_ECS_ETM_CTRL_EN_POS)
69 #define MCHP_ECS_DCTRL_DBG_EN BIT(MCHP_ECS_DCTRL_DBG_EN_POS)
80 #define MCHP_ECS_DCTRL_PUEN BIT(MCHP_ECS_DCTRL_PUEN_POS)
82 #define MCHP_ECS_DCTRL_BSCAN_EN BIT(MCHP_ECS_DCTRL_BSCAN_POS)
88 #define MCHP_ECS_DW_SWAP_IN_EN BIT(MCHP_ECS_DW_SWAP_IN_POS)
90 #define MCHP_ECS_DW_SWAP_OUT_EN BIT(MCHP_ECS_DW_SWAP_OUT_POS)
109 #define MCHP_ECS_PECI_DISABLE BIT(MCHP_ECS_PECI_DIS_POS)
114 #define MCHP_ECS_VCI_FWO_SYS_SHDN BIT(MCHP_ECS_VCI_FWO_SYS_SHDN_POS)
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Dadc.h57 #define MCHP_ADC_SNG_DONE_GIRQ_VAL BIT(MCHP_ADC_SNG_DONE_GIRQ_POS)
58 #define MCHP_ADC_RPT_DONE_GIRQ_VAL BIT(MCHP_ADC_RPT_DONE_GIRQ_POS)
77 #define MCHP_ADC_CTRL_ACTV BIT(0)
78 #define MCHP_ADC_CTRL_START_SNGL BIT(1)
79 #define MCHP_ADC_CTRL_START_RPT BIT(2)
80 #define MCHP_ADC_CTRL_PWRSV_DIS BIT(3)
81 #define MCHP_ADC_CTRL_SRST BIT(4)
82 #define MCHP_ADC_CTRL_RPT_DONE_STS BIT(6) /* R/W1C */
83 #define MCHP_ADC_CTRL_SNGL_DONE_STS BIT(7) /* R/W1C */
96 #define MCHP_ADC_STATUS_CHAN(n) BIT(n)
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/hal_microchip-latest/mec/common/
Dmec_defs.h36 #ifndef BIT
37 #define BIT(n) (1ul << (n)) macro
45 #define BIT_CLR(v, bpos) (v) &= ~BIT(bpos)
/hal_microchip-latest/mec5/drivers/
Dmec_espi_taf.c43 (BIT(MEC_ESPI_TAF_MON_STS_TMOUT_ERR_Pos) | BIT(MEC_ESPI_TAF_MON_STS_OOR_ERR_Pos) \
44 | BIT(MEC_ESPI_TAF_MON_STS_ACCV_ERR_Pos) | BIT(MEC_ESPI_TAF_MON_STS_4KB_ERR_Pos) \
45 | BIT(MEC_ESPI_TAF_MON_STS_ERSZ_ERR_Pos))
Dmec_defs.h62 #define MEC_BIT_SET(d, pos) ((d) |= BIT(pos))
66 #define MEC_BIT_CLR(d, pos) ((d) &= ~BIT(pos))
/hal_microchip-latest/mpfs/drivers/mss/mss_ethernet_mac/
Dmss_ethernet_mac_regs.h703 #define GEM_DMA_BUS_WIDTH (BIT_25 | BIT_26 | BIT 27)