Searched refs:AXISW_CMD_ERR (Results 1 – 2 of 2) sorted by relevance
65 return ((AXISW->CMD & AXISW_CMD_ERR_MASK) >> AXISW_CMD_ERR); /*return error bit value*/ in MSS_AXISW_write_qos_val()94 return ((AXISW->CMD & AXISW_CMD_ERR_MASK) >> AXISW_CMD_ERR); /*return error bit value*/ in MSS_AXISW_read_qos_val()120 return ((AXISW->CMD & AXISW_CMD_ERR_MASK) >> AXISW_CMD_ERR); /*return error bit value*/ in MSS_AXISW_write_rate()150 return ((AXISW->CMD & AXISW_CMD_ERR_MASK) >> AXISW_CMD_ERR); /*return error bit value*/ in MSS_AXISW_read_rate()189 return ((AXISW->CMD & AXISW_CMD_ERR_MASK) >> AXISW_CMD_ERR); /*return error bit value*/ in MSS_AXISW_write_burstiness()214 return ((AXISW->CMD & AXISW_CMD_ERR_MASK) >> AXISW_CMD_ERR); /*return error bit value*/ in MSS_AXISW_read_burstiness()231 return ((AXISW->CMD & AXISW_CMD_ERR_MASK) >> AXISW_CMD_ERR); /*return error bit value*/ in MSS_AXISW_write_slave_ready()259 return ((AXISW->CMD & AXISW_CMD_ERR_MASK) >> AXISW_CMD_ERR); /*return error bit value*/ in MSS_AXISW_read_slave_ready()
119 #define AXISW_CMD_ERR 28U macro120 #define AXISW_CMD_ERR_MASK (uint32_t)(0x01U << AXISW_CMD_ERR)
