1 /*
2 * Copyright 2024 Microchip Technology Inc. and its subsidiaries.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6 #ifndef _MEC_BTIMER_API_H
7 #define _MEC_BTIMER_API_H
8
9 #include <stdbool.h>
10 #include <stddef.h>
11 #include <stdint.h>
12
13 #include "device_mec5.h"
14 #include "mec_defs.h"
15 #include "mec_retval.h"
16
17 /* Interfaces to any C modules */
18 #ifdef __cplusplus
19 extern "C"
20 {
21 #endif
22
23 /* 16-bit and 32-bit Basic Timers */
24 #define MEC5_BTIMER_MAX_FREQ_HZ 48000000u
25 #define MEC5_BTIMER_MAX_FREQ_DIVISOR 65536u
26 #define MEC5_BTIMER_MIN_FREQ_HZ (MEC5_BTIMER_MAX_FREQ_HZ / MEC5_BTIMER_MAX_FREQ_DIVISOR)
27
28 #define MEC5_BTIMER_CFG_FLAG_START_POS 0
29 #define MEC5_BTIMER_CFG_FLAG_AUTO_RELOAD_POS 1
30 #define MEC5_BTIMER_CFG_FLAG_COUNT_UP_POS 2
31 #define MEC5_BTIMER_CFG_FLAG_INTR_EN_POS 4
32
33 #if MEC5_BASIC_TIMER_INSTANCES
34 #define MEC5_BTIMER_INST_MASK MEC_GENMASK(MEC5_BASIC_TIMER_INSTANCES - 1, 0)
35 #else
36 #define MEC5_BTIMER_INST_MASK 0
37 #endif
38
39 /* forward reference */
40 struct mec_btmr_regs;
41
42 int mec_hal_btimer_has_counter32(struct mec_btmr_regs *regs);
43
44 /* Configure a basic timer for count interval at frequency = max / freq_div */
45 int mec_hal_btimer_init(struct mec_btmr_regs *regs, uint32_t freq_div,
46 uint32_t count, uint32_t flags);
47
48 #define MEC5_BTMR_RST_PRESERVE_FDIV_POS 0
49 #define MEC5_BTMR_RST_PRESERVE_DIR_POS 1
50 int mec_hal_btimer_reset(struct mec_btmr_regs *regs, uint32_t flags);
51
52 int mec_hal_btimer_girq_ctrl(struct mec_btmr_regs *regs, uint8_t enable);
53 int mec_hal_btimer_girq_status_clr(struct mec_btmr_regs *regs);
54
55 uint32_t mec_hal_btimer_freq(struct mec_btmr_regs *regs);
56
57 void mec_hal_btimer_pre_and_reload(struct mec_btmr_regs *regs,
58 uint32_t preload, uint8_t do_reload);
59
60 #define MEC5_BTIMER_START_FLAG_IEN_POS 0
61 #define MEC5_BTIMER_START_FLAG_AUTO_POS 1
62 #define MEC5_BTIMER_START_FLAG_DIR_UP 2
63 void mec_hal_btimer_start_load(struct mec_btmr_regs *regs, uint32_t initial_count,
64 uint32_t flags);
65 void mec_hal_btimer_auto_restart(struct mec_btmr_regs *regs, uint8_t enable);
66 bool mec_hal_btimer_is_auto_restart(struct mec_btmr_regs *regs);
67
68 bool mec_hal_btimer_is_enabled(struct mec_btmr_regs *regs);
69 bool mec_hal_btimer_is_started(struct mec_btmr_regs *regs);
70 bool mec_hal_btimer_is_counting_up(struct mec_btmr_regs *regs);
71
72 void mec_hal_btimer_reload_run(struct mec_btmr_regs *regs, uint32_t new_count);
73 void mec_hal_btimer_intr_clr(struct mec_btmr_regs *regs);
74 void mec_hal_btimer_intr_en(struct mec_btmr_regs *regs, uint8_t enable);
75
76 void mec_hal_btimer_pm_save_disable();
77 void mec_hal_btimer_pm_restore();
78
mec_hal_btimer_count(struct mec_btmr_regs * regs)79 static inline uint32_t mec_hal_btimer_count(struct mec_btmr_regs *regs)
80 {
81 return regs->COUNT;
82 }
83
mec_hal_btimer_preload(struct mec_btmr_regs * regs)84 static inline uint32_t mec_hal_btimer_preload(struct mec_btmr_regs *regs)
85 {
86 return regs->PRELOAD;
87 }
88
mec_hal_btimer_preload_set(struct mec_btmr_regs * regs,uint32_t preload)89 static inline void mec_hal_btimer_preload_set(struct mec_btmr_regs *regs, uint32_t preload)
90 {
91 regs->PRELOAD = preload;
92 }
93
mec_hal_btimer_count_set(struct mec_btmr_regs * regs,uint32_t cnt)94 static inline void mec_hal_btimer_count_set(struct mec_btmr_regs *regs, uint32_t cnt)
95 {
96 regs->COUNT = cnt;
97 }
98
mec_hal_btimer_status(struct mec_btmr_regs * regs)99 static inline uint32_t mec_hal_btimer_status(struct mec_btmr_regs *regs)
100 {
101 return regs->STATUS & MEC_BIT(MEC_BTMR_STATUS_EVENT_Pos);
102 }
103
mec_hal_btimer_enable(struct mec_btmr_regs * regs)104 static inline void mec_hal_btimer_enable(struct mec_btmr_regs *regs)
105 {
106 regs->CTRL |= MEC_BIT(MEC_BTMR_CTRL_ENABLE_Pos);
107 }
108
mec_hal_btimer_disable(struct mec_btmr_regs * regs)109 static inline void mec_hal_btimer_disable(struct mec_btmr_regs *regs)
110 {
111 regs->CTRL &= (uint32_t)~MEC_BIT(MEC_BTMR_CTRL_ENABLE_Pos);
112 }
113
mec_hal_btimer_start(struct mec_btmr_regs * regs)114 static inline void mec_hal_btimer_start(struct mec_btmr_regs *regs)
115 {
116 regs->CTRL |= (MEC_BIT(MEC_BTMR_CTRL_ENABLE_Pos) | MEC_BIT(MEC_BTMR_CTRL_START_Pos));
117 }
118
mec_hal_btimer_stop(struct mec_btmr_regs * regs)119 static inline void mec_hal_btimer_stop(struct mec_btmr_regs *regs)
120 {
121 regs->CTRL &= (uint32_t)~MEC_BIT(MEC_BTMR_CTRL_START_Pos);
122 }
123
mec_hal_btimer_halt(struct mec_btmr_regs * regs)124 static inline void mec_hal_btimer_halt(struct mec_btmr_regs *regs)
125 {
126 regs->CTRL |= MEC_BIT(MEC_BTMR_CTRL_HALT_Pos);
127 }
128
mec_hal_btimer_unhalt(struct mec_btmr_regs * regs)129 static inline void mec_hal_btimer_unhalt(struct mec_btmr_regs *regs)
130 {
131 regs->CTRL &= (uint32_t)~MEC_BIT(MEC_BTMR_CTRL_HALT_Pos);
132 }
133
mec_hal_btimer_reload(struct mec_btmr_regs * regs)134 static inline void mec_hal_btimer_reload(struct mec_btmr_regs *regs)
135 {
136 regs->CTRL |= MEC_BIT(MEC_BTMR_CTRL_RELOAD_Pos);
137 }
138
139
140 #ifdef __cplusplus
141 }
142 #endif
143
144 #endif /* #ifndef _MEC_BTIMER_API_H */
145
