1 /******************************************************************************* 2 * Copyright 2019-2021 Microchip FPGA Embedded Systems Solutions. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * MPFS HAL Embedded Software 7 * 8 */ 9 10 /******************************************************************************* 11 * 12 * @file mss_hart_ints.h 13 * @author Microchip-FPGA Embedded Systems Solutions 14 * @brief MPFS local interrupt definitions 15 * 16 * Definitions and functions associated with local interrupts for each hart. 17 * 18 */ 19 #ifndef MSS_HART_INTS_H 20 #define MSS_HART_INTS_H 21 22 #include <stdint.h> 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 typedef struct BEU_Type_ 29 { 30 volatile uint64_t CAUSE; 31 volatile uint64_t VALUE; 32 volatile uint64_t ENABLE; 33 volatile uint64_t PLIC_INT; 34 volatile uint64_t ACCRUED; 35 volatile uint64_t LOCAL_INT; 36 volatile uint64_t reserved2[((0x1000U/8U) - 0x6U)]; 37 } BEU_Type; 38 39 typedef struct BEU_Types_ 40 { 41 volatile BEU_Type regs[5]; 42 } BEU_Types; 43 44 #define MSS_BUS_ERROR_UNIT_H0 0x01700000UL 45 #define MSS_BUS_ERROR_UNIT_H1 0x01701000UL 46 #define MSS_BUS_ERROR_UNIT_H2 0x01702000UL 47 #define MSS_BUS_ERROR_UNIT_H3 0x01703000UL 48 #define MSS_BUS_ERROR_UNIT_H4 0x01704000UL 49 50 #define BEU ((BEU_Types *)MSS_BUS_ERROR_UNIT_H0) 51 52 /* 53 * Interrupt numbers U0 54 */ 55 56 #define MAINTENANCE_E51_INT 0 57 #define USOC_SMB_INTERRUPT_E51_INT 1 58 #define USOC_VC_INTERRUPT_E51_INT 2 59 #define G5C_MESSAGE_E51_INT 3 60 #define G5C_DEVRST_E51_INT 4 61 #define WDOG4_TOUT_E51_INT 5 62 #define WDOG3_TOUT_E51_INT 6 63 #define WDOG2_TOUT_E51_INT 7 64 #define WDOG1_TOUT_E51_INT 8 65 #define WDOG0_TOUT_E51_INT 9 66 #define WDOG0_MVRP_E51_INT 10 67 #define MMUART0_E51_INT 11 68 #define ENVM_E51_INT 12 69 #define ECC_CORRECT_E51_INT 13 70 #define ECC_ERROR_E51_INT 14 71 #define scb_INTERRUPT_E51_INT 15 72 #define FABRIC_F2H_32_E51_INT 16 73 #define FABRIC_F2H_33_E51_INT 17 74 #define FABRIC_F2H_34_E51_INT 18 75 #define FABRIC_F2H_35_E51_INT 19 76 #define FABRIC_F2H_36_E51_INT 20 77 #define FABRIC_F2H_37_E51_INT 21 78 #define FABRIC_F2H_38_E51_INT 22 79 #define FABRIC_F2H_39_E51_INT 23 80 #define FABRIC_F2H_40_E51_INT 24 81 #define FABRIC_F2H_41_E51_INT 25 82 83 #define FABRIC_F2H_42_E51_INT 26 84 #define FABRIC_F2H_43_E51_INT 27 85 #define FABRIC_F2H_44_E51_INT 28 86 #define FABRIC_F2H_45_E51_INT 29 87 #define FABRIC_F2H_46_E51_INT 30 88 #define FABRIC_F2H_47_E51_INT 31 89 #define FABRIC_F2H_48_E51_INT 32 90 #define FABRIC_F2H_49_E51_INT 33 91 #define FABRIC_F2H_50_E51_INT 34 92 #define FABRIC_F2H_51_E51_INT 35 93 94 #define FABRIC_F2H_52_E51_INT 36 95 #define FABRIC_F2H_53_E51_INT 37 96 #define FABRIC_F2H_54_E51_INT 38 97 #define FABRIC_F2H_55_E51_INT 39 98 #define FABRIC_F2H_56_E51_INT 40 99 #define FABRIC_F2H_57_E51_INT 41 100 #define FABRIC_F2H_58_E51_INT 42 101 #define FABRIC_F2H_59_E51_INT 43 102 #define FABRIC_F2H_60_E51_INT 44 103 #define FABRIC_F2H_61_E51_INT 45 104 105 #define FABRIC_F2H_62_E51_INT 46 106 #define FABRIC_F2H_63_E51_INT 47 107 108 #define LOCAL_INT_MAX 47U /* Highest numbered */ 109 #define LOCAL_INT_UNUSED 127U /* Signifies unused interrupt */ 110 /* 111 * Interrupts associated with 112 * MAINTENANCE_E51_INT 113 * 114 * A group of interrupt events are grouped into a single maintenance interrupt to the E51 CPU, 115 * on receiving this interrupt the E51 should read the maintenance system register to find out 116 * the interrupt source. The maintenance interrupts are defined below 117 */ 118 #define MAINTENANCE_E51_pll_INT 0 119 #define MAINTENANCE_E51_mpu_INT 1 120 #define MAINTENANCE_E51_lp_state_enter_INT 2 121 #define MAINTENANCE_E51_lp_state_exit_INT 3 122 #define MAINTENANCE_E51_ff_start_INT 4 123 #define MAINTENANCE_E51_ff_end_INT 5 124 #define MAINTENANCE_E51_fpga_on_INT 6 125 #define MAINTENANCE_E51_fpga_off_INT 7 126 #define MAINTENANCE_E51_scb_error_INT 8 127 #define MAINTENANCE_E51_scb_fault_INT 9 128 #define MAINTENANCE_E51_mesh_error_INT 10 129 #define MAINTENANCE_E51_io_bank_b2_on_INT 12 130 #define MAINTENANCE_E51_io_bank_b4_on_INT 13 131 #define MAINTENANCE_E51_io_bank_b5_on_INT 14 132 #define MAINTENANCE_E51_io_bank_b6_on_INT 15 133 #define MAINTENANCE_E51_io_bank_b2_off_INT 16 134 #define MAINTENANCE_E51_io_bank_b4_off_INT 17 135 #define MAINTENANCE_E51_io_bank_b5_off_INT 18 136 #define MAINTENANCE_E51_io_bank_b6_off_INT 19 137 138 139 /* 140 * E51-0 is Maintenance Interrupt CPU needs to read status register to determine exact cause: 141 * These defines added here for clarity need to replay with status register defines 142 * for determining interrupt cause 143 */ 144 #ifndef FOR_CLARITY 145 # define FOR_CLARITY 0 146 #endif 147 148 #if FOR_CLARITY 149 # define mpu_fail_plic 0 150 # define lp_state_enter_plic 1 151 # define lp_state_exit_plic 2 152 # define ff_start_plic 3 153 # define ff_end_plic 4 154 # define fpga_on_plic 5 155 # define fpga_off_plic 6 156 # define scb_error_plic 7 157 # define scb_fault_plic 8 158 # define mesh_fail_plic 9 159 #endif 160 161 /* 162 * Interrupt numbers U54's 163 */ 164 165 /* U0 (first U54) and U1 connected to mac0 */ 166 #define MAC0_INT_U54_INT 8 /* determine source mac using hart ID */ 167 #define MAC0_QUEUE1_U54_INT 7 168 #define MAC0_QUEUE2_U54_INT 6 169 #define MAC0_QUEUE3_U54_INT 5 170 #define MAC0_EMAC_U54_INT 4 171 #define MAC0_MMSL_U54_INT 3 172 173 /* U2 and U3 connected to mac1 */ 174 #define MAC1_INT_U54_INT 8 /* determine source mac using hart ID */ 175 #define MAC1_QUEUE1_U54_INT 7 176 #define MAC1_QUEUE2_U54_INT 6 177 #define MAC1_QUEUE3_U54_INT 5 178 #define MAC1_EMAC_U54_INT 4 179 #define MAC1_MMSL_U54_INT 3 180 181 /* MMUART1 connected to U54 0 */ 182 /* MMUART2 connected to U54 1 */ 183 /* MMUART3 connected to U54 2 */ 184 /* MMUART4 connected to U54 3 */ 185 #define MMUARTx_U54_INT 11 /* MMUART1 connected to U54 0 */ 186 #define WDOGx_MVRP_U54_INT 10 /* determine source mac using hart ID */ 187 #define WDOGx_TOUT_U54_INT 9 /* determine source mac using hart ID */ 188 189 #define H2_FABRIC_F2H_0_U54_INT 16 190 #define H2_FABRIC_F2H_1_U54_INT 17 191 #define H2_FABRIC_F2H_2_U54_INT 18 192 #define H2_FABRIC_F2H_3_U54_INT 19 193 #define H2_FABRIC_F2H_4_U54_INT 20 194 #define H2_FABRIC_F2H_5_U54_INT 21 195 #define H2_FABRIC_F2H_6_U54_INT 22 196 #define H2_FABRIC_F2H_7_U54_INT 23 197 #define H2_FABRIC_F2H_8_U54_INT 24 198 #define H2_FABRIC_F2H_9_U54_INT 25 199 200 #define H2_FABRIC_F2H_10_U54_INT 26 201 #define H2_FABRIC_F2H_11_U54_INT 27 202 #define H2_FABRIC_F2H_12_U54_INT 28 203 #define H2_FABRIC_F2H_13_U54_INT 29 204 #define H2_FABRIC_F2H_14_U54_INT 30 205 #define H2_FABRIC_F2H_15_U54_INT 31 206 #define H2_FABRIC_F2H_16_U54_INT 32 207 #define H2_FABRIC_F2H_17_U54_INT 33 208 #define H2_FABRIC_F2H_18_U54_INT 34 209 #define H2_FABRIC_F2H_19_U54_INT 35 210 211 #define H2_FABRIC_F2H_20_U54_INT 36 212 #define H2_FABRIC_F2H_21_U54_INT 37 213 #define H2_FABRIC_F2H_22_U54_INT 38 214 #define H2_FABRIC_F2H_23_U54_INT 39 215 #define H2_FABRIC_F2H_24_U54_INT 40 216 #define H2_FABRIC_F2H_25_U54_INT 41 217 #define H2_FABRIC_F2H_26_U54_INT 42 218 #define H2_FABRIC_F2H_27_U54_INT 43 219 #define H2_FABRIC_F2H_28_U54_INT 44 220 #define H2_FABRIC_F2H_29_U54_INT 45 221 222 #define H2_FABRIC_F2H_30_U54_INT 46 223 #define H2_FABRIC_F2H_31_U54_INT 47 224 225 226 void handle_m_ext_interrupt(void); 227 void Software_h0_IRQHandler(void); 228 void Software_h1_IRQHandler(void); 229 void Software_h2_IRQHandler(void); 230 void Software_h3_IRQHandler(void); 231 void Software_h4_IRQHandler(void); 232 void SysTick_Handler_h0_IRQHandler(void); 233 void SysTick_Handler_h1_IRQHandler(void); 234 void SysTick_Handler_h2_IRQHandler(void); 235 void SysTick_Handler_h3_IRQHandler(void); 236 void SysTick_Handler_h4_IRQHandler(void); 237 238 /* 239 * 240 * Local interrupt defines 241 * 242 */ 243 void maintenance_e51_local_IRQHandler_0(void); 244 void usoc_smb_interrupt_e51_local_IRQHandler_1(void); 245 void usoc_vc_interrupt_e51_local_IRQHandler_2(void); 246 void g5c_message_e51_local_IRQHandler_3(void); 247 void g5c_devrst_e51_local_IRQHandler_4(void); 248 void wdog4_tout_e51_local_IRQHandler_5(void); 249 void wdog3_tout_e51_local_IRQHandler_6(void); 250 void wdog2_tout_e51_local_IRQHandler_7(void); 251 void wdog1_tout_e51_local_IRQHandler_8(void); 252 void wdog0_tout_e51_local_IRQHandler_9(void); 253 void wdog0_mvrp_e51_local_IRQHandler_10(void); 254 void mmuart0_e51_local_IRQHandler_11(void); 255 void envm_e51_local_IRQHandler_12(void); 256 void ecc_correct_e51_local_IRQHandler_13(void); 257 void ecc_error_e51_local_IRQHandler_14(void); 258 void scb_interrupt_e51_local_IRQHandler_15(void); 259 void fabric_f2h_32_e51_local_IRQHandler_16(void); 260 void fabric_f2h_33_e51_local_IRQHandler_17(void); 261 void fabric_f2h_34_e51_local_IRQHandler_18(void); 262 void fabric_f2h_35_e51_local_IRQHandler_19(void); 263 void fabric_f2h_36_e51_local_IRQHandler_20(void); 264 void fabric_f2h_37_e51_local_IRQHandler_21(void); 265 void fabric_f2h_38_e51_local_IRQHandler_22(void); 266 void fabric_f2h_39_e51_local_IRQHandler_23(void); 267 void fabric_f2h_40_e51_local_IRQHandler_24(void); 268 void fabric_f2h_41_e51_local_IRQHandler_25(void); 269 void fabric_f2h_42_e51_local_IRQHandler_26(void); 270 void fabric_f2h_43_e51_local_IRQHandler_27(void); 271 void fabric_f2h_44_e51_local_IRQHandler_28(void); 272 void fabric_f2h_45_e51_local_IRQHandler_29(void); 273 void fabric_f2h_46_e51_local_IRQHandler_30(void); 274 void fabric_f2h_47_e51_local_IRQHandler_31(void); 275 void fabric_f2h_48_e51_local_IRQHandler_32(void); 276 void fabric_f2h_49_e51_local_IRQHandler_33(void); 277 void fabric_f2h_50_e51_local_IRQHandler_34(void); 278 void fabric_f2h_51_e51_local_IRQHandler_35(void); 279 void fabric_f2h_52_e51_local_IRQHandler_36(void); 280 void fabric_f2h_53_e51_local_IRQHandler_37(void); 281 void fabric_f2h_54_e51_local_IRQHandler_38(void); 282 void fabric_f2h_55_e51_local_IRQHandler_39(void); 283 void fabric_f2h_56_e51_local_IRQHandler_40(void); 284 void fabric_f2h_57_e51_local_IRQHandler_41(void); 285 void fabric_f2h_58_e51_local_IRQHandler_42(void); 286 void fabric_f2h_59_e51_local_IRQHandler_43(void); 287 void fabric_f2h_60_e51_local_IRQHandler_44(void); 288 void fabric_f2h_61_e51_local_IRQHandler_45(void); 289 void fabric_f2h_62_e51_local_IRQHandler_46(void); 290 void fabric_f2h_63_e51_local_IRQHandler_47(void); 291 292 /* 293 * U54 294 */ 295 void spare_u54_local_IRQHandler_0(void); 296 void spare_u54_local_IRQHandler_1(void); 297 void spare_u54_local_IRQHandler_2(void); 298 299 void mac_mmsl_u54_1_local_IRQHandler_3(void); 300 void mac_emac_u54_1_local_IRQHandler_4(void); 301 void mac_queue3_u54_1_local_IRQHandler_5(void); 302 void mac_queue2_u54_1_local_IRQHandler_6(void); 303 void mac_queue1_u54_1_local_IRQHandler_7(void); 304 void mac_int_u54_1_local_IRQHandler_8(void); 305 306 void mac_mmsl_u54_2_local_IRQHandler_3(void); 307 void mac_emac_u54_2_local_IRQHandler_4(void); 308 void mac_queue3_u54_2_local_IRQHandler_5(void); 309 void mac_queue2_u54_2_local_IRQHandler_6(void); 310 void mac_queue1_u54_2_local_IRQHandler_7(void); 311 void mac_int_u54_2_local_IRQHandler_8(void); 312 313 void mac_mmsl_u54_3_local_IRQHandler_3(void); 314 void mac_emac_u54_3_local_IRQHandler_4(void); 315 void mac_queue3_u54_3_local_IRQHandler_5(void); 316 void mac_queue2_u54_3_local_IRQHandler_6(void); 317 void mac_queue1_u54_3_local_IRQHandler_7(void); 318 void mac_int_u54_3_local_IRQHandler_8(void); 319 320 void mac_mmsl_u54_4_local_IRQHandler_3(void); 321 void mac_emac_u54_4_local_IRQHandler_4(void); 322 void mac_queue3_u54_4_local_IRQHandler_5(void); 323 void mac_queue2_u54_4_local_IRQHandler_6(void); 324 void mac_queue1_u54_4_local_IRQHandler_7(void); 325 void mac_int_u54_4_local_IRQHandler_8(void); 326 327 void wdog_tout_u54_h1_local_IRQHandler_9(void); 328 void wdog_tout_u54_h2_local_IRQHandler_9(void); 329 void wdog_tout_u54_h3_local_IRQHandler_9(void); 330 void wdog_tout_u54_h4_local_IRQHandler_9(void); 331 void mvrp_u54_local_IRQHandler_10(void); 332 void mmuart_u54_h1_local_IRQHandler_11(void); 333 void mmuart_u54_h2_local_IRQHandler_11(void); 334 void mmuart_u54_h3_local_IRQHandler_11(void); 335 void mmuart_u54_h4_local_IRQHandler_11(void); 336 void spare_u54_local_IRQHandler_12(void); 337 void spare_u54_local_IRQHandler_13(void); 338 void spare_u54_local_IRQHandler_14(void); 339 void spare_u54_local_IRQHandler_15(void); 340 void fabric_f2h_0_u54_local_IRQHandler_16(void); 341 void fabric_f2h_1_u54_local_IRQHandler_17(void); 342 void fabric_f2h_2_u54_local_IRQHandler_18(void); 343 void fabric_f2h_3_u54_local_IRQHandler_19(void); 344 void fabric_f2h_4_u54_local_IRQHandler_20(void); 345 void fabric_f2h_5_u54_local_IRQHandler_21(void); 346 void fabric_f2h_6_u54_local_IRQHandler_22(void); 347 void fabric_f2h_7_u54_local_IRQHandler_23(void); 348 void fabric_f2h_8_u54_local_IRQHandler_24(void); 349 void fabric_f2h_9_u54_local_IRQHandler_25(void); 350 void fabric_f2h_10_u54_local_IRQHandler_26(void); 351 void fabric_f2h_11_u54_local_IRQHandler_27(void); 352 void fabric_f2h_12_u54_local_IRQHandler_28(void); 353 void fabric_f2h_13_u54_local_IRQHandler_29(void); 354 void fabric_f2h_14_u54_local_IRQHandler_30(void); 355 void fabric_f2h_15_u54_local_IRQHandler_31(void); 356 void fabric_f2h_16_u54_local_IRQHandler_32(void); 357 void fabric_f2h_17_u54_local_IRQHandler_33(void); 358 void fabric_f2h_18_u54_local_IRQHandler_34(void); 359 void fabric_f2h_19_u54_local_IRQHandler_35(void); 360 void fabric_f2h_20_u54_local_IRQHandler_36(void); 361 void fabric_f2h_21_u54_local_IRQHandler_37(void); 362 void fabric_f2h_22_u54_local_IRQHandler_38(void); 363 void fabric_f2h_23_u54_local_IRQHandler_39(void); 364 void fabric_f2h_24_u54_local_IRQHandler_40(void); 365 void fabric_f2h_25_u54_local_IRQHandler_41(void); 366 void fabric_f2h_26_u54_local_IRQHandler_42(void); 367 void fabric_f2h_27_u54_local_IRQHandler_43(void); 368 void fabric_f2h_28_u54_local_IRQHandler_44(void); 369 void fabric_f2h_29_u54_local_IRQHandler_45(void); 370 void fabric_f2h_30_u54_local_IRQHandler_46(void); 371 void fabric_f2h_31_u54_local_IRQHandler_47(void); 372 373 #ifdef __cplusplus 374 } 375 #endif 376 377 #endif /* MSS_HART_INTS_H */ 378
