1 /* 2 * Copyright 2024 Microchip Technology Inc. and its subsidiaries. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 #ifndef _MEC_PCFG_H 7 #define _MEC_PCFG_H 8 9 /* DMA API checks DMA channle ID parameter */ 10 #define MEC_DMA_CHAN_VALID_CHECK 11 12 /* GPIO module checks ID */ 13 #define MEC_GPIO_PIN_VALIDATION 14 /* #define MEC_GPIO_PAROUT_BITBAND */ 15 16 /* GPIO module anomalies */ 17 #define MEC_GPIO_IDET_CHG_ANOMALY_FIX 18 19 /* Timer modules checks ID */ 20 #define MEC_BTIMER_CHECK_ID 21 22 /* Enable register pointer checks in eSPI TAF API's */ 23 #define MEC_ESPI_TAF_CHECK_REG_ADDR 24 25 /* Enable checks of I2C base adress passed to I2C API's */ 26 #define MEC_I2C_BASE_CHECK 27 28 /* Enable checks of base address passed to KBC API's */ 29 /* #define MEC_KBC_BASE_CHECK */ 30 31 /* Enable checks of base address passed to Key scan API's */ 32 /* #define MEC_KSCAN_BASE_CHECK */ 33 34 /* Enable checks of base address passed to ACPI_EC API's */ 35 /* #define MEC_ACPI_EC_BASE_CHECK */ 36 37 /* LED API checks LED ID parameter */ 38 #define MEC_LED_ENABLE_VALID_CHECK 39 40 /* Enable checks of base address passed to PECI API's */ 41 /* #define MEC_PECI_BASE_CHECK */ 42 43 /* QSPI LDMA transfer API: treat TX and RX buffer NULL pointers 44 * with non-zero length as a request to generate SPI clocks with 45 * I/O lines tri-stated. Length is the number of clocks. 46 */ 47 #define MEC5_QSPI_LDMA_TX_NULL_LEN_ARE_CLOCKS 48 49 /* Enable TFDP trace code */ 50 /* #define MEC_TRACE_ENABLE */ 51 /* #define MEC_TRACE_INLINE */ 52 /* #define MEC_TRACE_MASK_IRQ */ 53 54 #define MEC_TFDP_DELAY() 55 56 #endif /* #ifndef _MEC_PCFG_H */ 57 /* end mec_pcfg.h */ 58
