Searched refs:IRQ (Results 1 – 25 of 139) sorted by relevance
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852 #define IRQ(nr) vector_ ## nr: pushq $(nr - IV_IRQS); jmp irq macro854 IRQ( 33); IRQ( 34); IRQ( 35); IRQ( 36); IRQ( 37); IRQ( 38); IRQ( 39)855 IRQ( 40); IRQ( 41); IRQ( 42); IRQ( 43); IRQ( 44); IRQ( 45); IRQ( 46); IRQ( 47)856 IRQ( 48); IRQ( 49); IRQ( 50); IRQ( 51); IRQ( 52); IRQ( 53); IRQ( 54); IRQ( 55)857 IRQ( 56); IRQ( 57); IRQ( 58); IRQ( 59); IRQ( 60); IRQ( 61); IRQ( 62); IRQ( 63)858 IRQ( 64); IRQ( 65); IRQ( 66); IRQ( 67); IRQ( 68); IRQ( 69); IRQ( 70); IRQ( 71)859 IRQ( 72); IRQ( 73); IRQ( 74); IRQ( 75); IRQ( 76); IRQ( 77); IRQ( 78); IRQ( 79)860 IRQ( 80); IRQ( 81); IRQ( 82); IRQ( 83); IRQ( 84); IRQ( 85); IRQ( 86); IRQ( 87)861 IRQ( 88); IRQ( 89); IRQ( 90); IRQ( 91); IRQ( 92); IRQ( 93); IRQ( 94); IRQ( 95)862 IRQ( 96); IRQ( 97); IRQ( 98); IRQ( 99); IRQ(100); IRQ(101); IRQ(102); IRQ(103)[all …]
8 * The RTC IRQ is not routed to the IOAPIC if the legacy9 * IRQ bit is set. The IRQ is required for alarm
18 Available IRQ line: 4219 Got IRQ: 4220 Got IRQ: 4221 Got IRQ: 42
55 bool "Configure IRQ affinity"59 Enable configuration of IRQ affinity.62 hex "Default IRQ affinity mask"66 Default mask for the driver when IRQ affinity is enabled.78 bool "IRQ count shell commands"85 bool "Shell commands to configure IRQ affinity"89 Provide shell commands to configure IRQ affinity in runtime.
15 int "Shared IRQ init priority"19 Shared IRQ are initialized on POST_KERNEL init level. They
4 int "Level $(prev-level-num) IRQ line for $(cur-level) level aggregator $(aggregator)"
17 int "Stack size for a thread that processes TJA1103 IRQ"21 process raised INT IRQ.28 INT IRQ processing.
6 * Some ARM platforms require this symbol to be placed after the IRQ vector8 * arch/arm/core/vector_table.ld when the IRQ vector table is enabled.
9 * Some ARM platforms require this symbol to be placed after the IRQ vector11 * arch/arm/core/vector_table.ld when the IRQ vector table is enabled.
25 # need to activate Zero Latency IRQ in Zephyr by default. The level (2) depends on the27 # if you use an IRQ with a priority of 0 or 1, irq_lock() and irq_unlock() have no effect28 # over this IRQ.
11 IRQ -> plic0@1014 IRQ -> plic1@10
31 int "Stack size for a thread that processes IRQ"35 process raised INT IRQ.42 INT IRQ processing.
24 int "Stack size for a thread that processes ADIN IRQ"28 process raised INT IRQ.35 INT IRQ processing.
62 IRQ->nvic0@1867 IRQ->nvic0@9181 IRQ->nvic0@36
24 * An **interrupt request (IRQ) signal** that triggers the ISR.25 * A **priority level** associated with the IRQ.31 Only a single ISR can be associated with a specific IRQ at any given time.128 A thread may temporarily prevent all IRQ handling in the system using129 an **IRQ lock**. This lock can be applied even when it is already in effect,131 The thread must unlock its IRQ lock the same number of times it was locked136 The IRQ lock is thread-specific. If thread A locks out interrupts138 for N milliseconds), the thread's IRQ lock no longer applies once144 IRQ lock. (Whether interrupts can be processed while the kernel is145 switching between two threads that are using the IRQ lock is[all …]
102 metal: info: metal_uio_dev_open: No IRQ for device 10400000.mbox-uio.103 metal: info: metal_uio_dev_open: No IRQ for device 11010000.cpg-uio.105 metal: info: metal_uio_dev_open: No IRQ for device 42f00000.rsctbl.108 metal: info: metal_uio_dev_open: No IRQ for device 43000000.vring-ctl0.111 metal: info: metal_uio_dev_open: No IRQ for device 43200000.vring-shm0.114 metal: info: metal_uio_dev_open: No IRQ for device 43100000.vring-ctl1.117 metal: info: metal_uio_dev_open: No IRQ for device 43500000.vring-shm1.120 metal: info: metal_uio_dev_open: No IRQ for device 42f01000.mhu-shm.
18 The third test verifies the behavior of the IRQ Target State API for54 Available IRQ line: 5758 Available IRQ line: 93
1 /* Keep default IRQ priority low for peripherals to reduce Radio ISR latency.
13 /* Uncomment to use IRQ instead of polling: */
15 /* GT911 IRQ GPIO is active low on this board, and needs probing mode */
