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Searched refs:clk_speed_hz (Results 1 – 2 of 2) sorted by relevance

/hal_intel-3.6.0/bsp_sedi/drivers/usart/
Dsedi_dw_uart.c1445 int sedi_uart_set_baud_rate(IN sedi_uart_t uart, IN uint32_t baud_rate, IN uint32_t clk_speed_hz) in sedi_uart_set_baud_rate() argument
1450 uint32_t divisor = clk_speed_hz / (baud_rate << 4); in sedi_uart_set_baud_rate()
1452 uint32_t dlf = (clk_speed_hz % (baud_rate << 4)) / baud_rate; in sedi_uart_set_baud_rate()
1454 ((clk_speed_hz % (baud_rate << 4)) * SEDI_UART_DLF_SCALAR) / baud_rate; in sedi_uart_set_baud_rate()
1472 clk_speed_cache[uart] = clk_speed_hz; in sedi_uart_set_baud_rate()
1491 cfg->clk_speed_hz = clk_speed_cache[uart]; in sedi_uart_get_config()
/hal_intel-3.6.0/bsp_sedi/include/driver/
Dsedi_driver_uart.h194 uint32_t clk_speed_hz; /**< Clock speed for uart in Hz. */ member